orr

Vector Bitwise OR

ORR <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Bitwise OR of two vectors.

Details

The Vector Bitwise OR instruction bitwise OR of two vectors.

Pseudocode Operation

Vd ← Vn OR Vm

Example

ORR v0.4s.T, v1.4s.T, v2.4s.T

Encoding

Binary Layout
0
Q
001110
10
1
Rm
0001
1
Rn
Rd
 
Format SIMD Three Register
Opcode 0x0EA01C00
Extension NEON (SIMD)

Operands

  • Vd
    Destination SIMD/FP vector register
  • Vn
    First source SIMD/FP vector register
  • Vm
    Second source SIMD/FP vector register