sturb

Store Register Byte (Unscaled)

STURB <Wt>, [<Xn|SP>, #<simm>]

Stores a byte using an unscaled immediate offset.

Pseudocode Operation

address ← Xn + SignExtend(imm9, 64)
[address, 1] ← Wt[7:0]

Example

STURB w3, [x1, #-8]

Encoding

Binary Layout

00

31:30

111

29:27

0

26

00

25:24

00

23:22

0

21

imm9

20:12

00

11:10

Rn

9:5

Rt

4:0

 

Format Load/Store

Opcode 0x38000000

Extension Base

Operands

• Wt
  Transfer 32-bit integer register (load/store)
• Xn
  First source / base 64-bit integer register
• simm
  Signed immediate offset

Related

More in Base

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x38000000	STURB <Wt>, [<Xn|SP>{, #<simm>}]		A64		00 | 111 | 0 | 00 | 00 | 0 | imm9 | 00 | Rn | Rt

Description

Store Register Byte (unscaled) calculates an address from a base register value and an immediate offset, and stores a byte to the calculated address, from a 32-bit register. For information about memory accesses, see Load/Store addressing modes.

Operation

bits(64) address;
bits(8) data;

boolean privileged = PSTATE.EL != EL0;
AccessDescriptor accdesc = CreateAccDescGPR(MemOp_STORE, FALSE, privileged, tagchecked);

if n == 31 then
    CheckSPAlignment();
    address = SP[];
else
    address = X[n, 64];

address = GenerateAddress(address, offset, accdesc);

data = X[t, 8];
Mem[address, 1, accdesc] = data;