ldrh

Load Register Halfword (Register)

LDRH <Wt>, [<Xn|SP>, <R><m> {, <extend> <amount>}]

Loads a halfword from memory (zero-extended) using register offset.

Details

The Load Register Halfword instruction loads a halfword from memory (zero-extended) using register offset.

Pseudocode Operation

Wt ← Memory[address]

Example

LDRH w3, [x1, Rm ]

Encoding

Binary Layout
01111000
011
Rm
option
S
10
Rn
Rt
 
Format Load/Store
Opcode 0x78600800
Extension Base

Operands

  • Wt
    Transfer 32-bit integer register (load/store)
  • Xn
    First source / base 64-bit integer register
  • Rm
    Offset Reg