smulh

Signed Multiply High

SMULH <Xd>, <Xn>, <Xm>

Multiplies two 64-bit registers, keeps high 64 bits.

Details

Multiplies two signed 64-bit integers in Xn and Xm and places the high 64 bits of the 128-bit result in Xd. This instruction is used when the full precision of a 64×64 signed multiplication is needed. No condition flags are affected. This instruction is AArch64-only.

Pseudocode Operation

result ← Xn * Xm
Xd ← result[127:64]
N ← unchanged
Z ← unchanged
C ← unchanged
V ← unchanged

Example

SMULH x0, x1, x2

Encoding

Binary Layout
1
00
11011
0
10
Rm
0
11111
Rn
Rd
 
Format Data Processing
Opcode 0x9B407C00
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Xn
    First source / base 64-bit integer register
  • Xm
    Second source / offset 64-bit integer register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x9B407C00 SMULH <Xd>, <Xn>, <Xm> A64 1 | 00 | 11011 | 0 | 10 | Rm | 0 | 11111 | Rn | Rd
0x04120000 SMULH <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> A64 00000100 | size | 0100 | 1 | 0 | 000 | Pg | Zm | Zdn
0x04206800 SMULH <Zd>.<T>, <Zn>.<T>, <Zm>.<T> A64 00000100 | size | 1 | Zm | 0110 | 1 | 0 | Zn | Zd

Description

Signed Multiply High multiplies two 64-bit register values, and writes bits[127:64] of the 128-bit result to the 64-bit destination register.

Operation

bits(64) operand1 = X[n, 64];
bits(64) operand2 = X[m, 64];

integer result;

result = Int(operand1, FALSE) * Int(operand2, FALSE);

X[d, 64] = result<127:64>;