mcrr

Move to Coprocessor from Two Registers (A32)

MCRR<c> <coproc>, <opc1>, <Rt>, <Rt2>, <CRm>

Writes two general-purpose registers to a coprocessor (64-bit transfer).

Pseudocode Operation

if ConditionPassed(cond) then
  CP64[coproc, opc1, CRm] ← (Rt2:Rt)
  // Rt holds bits [31:0], Rt2 holds bits [63:32]

Example

MCRR p15, 0, r3, r4, c2

Encoding

Binary Layout

cond

31:28

11000

27:23

1

22

0

21

0

20

Rt2

19:16

Rt

15:12

111

11:9

coproc<0>

8

opc1

7:4

CRm

3:0

 

Format Coprocessor

Opcode 0x0C400E00

Extension A32 (System)

Operands

• coproc
  CP Num
• Rt
  Transfer general-purpose register (load/store)
• Rt2
  Second transfer register (load/store pair)

Related

More in A32 (System)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x0C400E00	MCRR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm>		A32		cond | 11000 | 1 | 0 | 0 | Rt2 | Rt | 111 | coproc<0> | opc1 | CRm
0xEC400E00	MCRR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm>		T32		111011000 | 1 | 0 | 0 | Rt2 | Rt | 111 | coproc<0> | opc1 | CRm

Description

Move to System register from two general-purpose registers. This instruction copies the values of two general-purpose registers to a System register. The System register descriptions identify valid encodings for this instruction. Other encodings are undefined. For more information see About the AArch32 System register interface and General behavior of System registers. In an implementation that includes EL2, MCRR accesses to System registers can be trapped to Hyp mode, meaning that an attempt to execute an MCRR instruction in a Non-secure mode other than Hyp mode, that would be permitted in the absence of the Hyp trap controls, generates a Hyp Trap exception. For more information, see EL2 configurable instruction enables, disables, and traps. Because of the range of possible traps to Hyp mode, the MCRR pseudocode does not show these possible traps.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    AArch32.SysRegWrite64(cp, ThisInstr(), t, t2);