adc

Add with Carry (64-bit)

ADC <Xd>, <Xn>, <Xm>

Adds two 64-bit register values and the Carry flag.

Details

Add with Carry adds two 64-bit register values and the Carry flag, storing the result in a 64-bit register. The N, Z, C, and V flags are not modified; use ADCS to update flags. This instruction is AArch64-only and executes at any privilege level.

Pseudocode Operation

Xd ← Xn + Xm + C

Example

ADC x0, x1, x2

Encoding

Binary Layout
1
0
0
11010000
Rm
000000
Rn
Rd
 
Format Data Processing (3-source)
Opcode 0x9A000000
Extension Base

Operands

  • Xd
    Dest (64-bit)
  • Xn
    First source / base 64-bit integer register
  • Xm
    Second source / offset 64-bit integer register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x1A000000 ADC <Wd>, <Wn>, <Wm> A64 0 | 0 | 0 | 11010000 | Rm | 000000 | Rn | Rd
0x9A000000 ADC <Xd>, <Xn>, <Xm> A64 1 | 0 | 0 | 11010000 | Rm | 000000 | Rn | Rd

Description

Add with Carry adds two register values and the Carry flag value, and writes the result to the destination register.

Operation

bits(datasize) result;
bits(datasize) operand1 = X[n, datasize];
bits(datasize) operand2 = X[m, datasize];

(result, -) = AddWithCarry(operand1, operand2, PSTATE.C);

X[d, datasize] = result;