vqshr
Vector Saturating Shift Right (Unsigned)
VQSHR<c>.U<size> <Qd>, <Qm>, #<imm>
Shifts right with saturation (Unsigned).
Details
Vector Saturating Shift Right (Unsigned) shifts each unsigned element in Qm right by an immediate value, saturating underflow to zero. The immediate specifies the right shift count. All condition flags (N, Z, C, V) remain unaffected. This is an A32/T32 NEON instruction for unsigned data types.
Pseudocode Operation
shift_amount ← imm6
for i = 0 to elements-1 do
if shift_amount > 0 then
result ← SatQ(Qm[i] >> shift_amount, 0, max_unsigned_value)
else
result ← Qm[i]
Qd[i] ← result
Example
VQSHR.Usize q0, q2, #16
Encoding
Binary Layout
11110010
1
D
imm6
Vd
1101
L
Q
M
1
Vm
Operands
-
Qd
Destination 128-bit SIMD register -
Qm
Second source 128-bit SIMD register -
imm
Signed immediate value