bfi

Bit Field Insert

BFI<c> <Rd>, <Rn>, #<lsb>, #<width>

Copies a bitfield into a register.

Details

Copies a contiguous bitfield from the source register into the destination register at a specified bit position, preserving all other bits. No condition flags are affected. This is an A32 instruction where the condition code (cond) field determines execution; width is computed as (msb−lsb+1).

Pseudocode Operation

width ← msb - lsb + 1
mask ← ((1 << width) - 1)
source_bits ← (Rn AND mask) << lsb
dest_mask ← NOT((mask << lsb))
Rd ← (Rd AND dest_mask) OR source_bits

Example

BFI r0, r1, #0, #width

Encoding

Binary Layout
cond
0111110
msb
Rd
lsb
001
Rn
 
Format Data Proc
Opcode 0x07C00010
Extension A32 (Base)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • lsb
    Start

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x07C00010 BFI{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width> A32 cond | 0111110 | msb | Rd | lsb | 001 | Rn
0xF3600000 BFI{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width> T32 11110 | 0 | 11 | 01 | 1 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | msb

Description

Bit Field Insert copies any number of low order bits from a register into the same number of adjacent bits at any position in the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    R[d]<msbit:lsbit> = R[n]<(msbit-lsbit):0>;
    // Other bits of R[d] are unchanged