strex

Store Register Exclusive (Thumb)

STREX <Rd>, <Rt>, [<Rn>]

Stores word if exclusive monitor is open (Thumb).

Pseudocode Operation

address ← Rn
if ExclusiveMonitor[address] then
  [address] ← Rt
  Rd ← 0
  ClearExclusiveMonitor()
else
  Rd ← 1

Example

STREX r0, r3, [r1]

Encoding

Binary Layout

11101000010

31:21

0

20

Rn

19:16

Rt

15:12

Rd

11:8

imm8

7:0

 

Format Thumb Store Excl

Opcode 0xE8400000

Extension A32 (Atomic)

Operands

• Rd
  Status
• Rt
  Transfer general-purpose register (load/store)
• Rn
  First source / base general-purpose register

Related

More in A32 (Atomic)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x01800F90	STREX{<c>}{<q>} <Rd>, <Rt>, [<Rn> {, {#}<imm>}]		A32		cond | 00011 | 00 | 0 | Rn | Rd | 1 | 1 | 1 | 1 | 1001 | Rt
0xE8400000	STREX{<c>}{<q>} <Rd>, <Rt>, [<Rn> {, #<imm>}]		T32		11101000010 | 0 | Rn | Rt | Rd | imm8

Description

Store Register Exclusive calculates an address from a base register value and an immediate offset, stores a word from a register to the calculated address if the PE has exclusive access to the memory at that address, and returns a status value of 0 if the store was successful, or of 1 if no store was performed. For more information about support for shared memory see Synchronization and semaphores. For information about memory accesses see Memory accesses.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    address = R[n] + imm32;
    if AArch32.ExclusiveMonitorsPass(address,4) then
        MemA[address,4] = R[t];
        R[d] = ZeroExtend('0', 32);
    else
        R[d] = ZeroExtend('1', 32);