cpy

Memory Copy (SVE2)

CPY <Zd>.<T>, <Pg>/M, <Zn>.<T>

Copies data from source to destination using SVE vector length.

Details

Copies data from a source SVE vector register to a destination SVE vector register under predicate control, operating on elements of the specified type. This SVE2 instruction processes VL/element-size elements in parallel and does not affect condition flags. The predicate register controls which elements are copied; unpredicated elements in the destination are left unchanged.

Pseudocode Operation

for i = 0 to VL/esize-1 do
  if Pg[i] == '1' then
    Zd[i*esize +: esize] ← Zn[i*esize +: esize]

Example

CPY z0.s.T, p0/m/M, z1.s.T

Encoding

Binary Layout
00000101
size
100000100
Pg
Vn
Zd
 
Format SVE2 Move
Opcode 0x05208000
Extension SVE2

Operands

  • Zd
    Destination scalable vector register (SVE)
  • Pg
    Mask
  • Zn
    First source scalable vector register (SVE)

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x05100000 CPY <Zd>.<T>, <Pg>/Z, #<imm>{, <shift>} A64 00000101 | size | 01 | Pg | 0 | 0 | sh | imm8 | Zd
0x05104000 CPY <Zd>.<T>, <Pg>/M, #<imm>{, <shift>} A64 00000101 | size | 01 | Pg | 0 | 1 | sh | imm8 | Zd
0x0528A000 CPY <Zd>.<T>, <Pg>/M, <R><n|SP> A64 00000101 | size | 101000101 | Pg | Rn | Zd
0x05208000 CPY <Zd>.<T>, <Pg>/M, <V><n> A64 00000101 | size | 100000100 | Pg | Vn | Zd

Description

Copy the SIMD & floating-point scalar source register to each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = P[g, PL];
bits(esize) operand1 = if AnyActiveElement(mask, esize) then V[n, esize] else Zeros(esize);
bits(VL) result = Z[d, VL];

for e = 0 to elements-1
    if ActivePredicateElement(mask, e, esize) then
        Elem[result, e, esize] = operand1;

Z[d, VL] = result;