csinc

Conditional Select Increment

CSINC <Wd>, <Wn>, <Wm>, <cond>

Selects Wn if cond true, else (Wm + 1).

Details

Conditionally selects between two values: if the condition is true, writes Wn to Wd; otherwise writes (Wm + 1) to Wd. The upper 32 bits of Xd are zeroed. No flags are affected by this instruction. Available in AArch64 only.

Pseudocode Operation

if ConditionHolds(cond) then
  Wd ← Wn
else
  Wd ← Wm + 1

Example

CSINC w0, w1, w2, cond

Encoding

Binary Layout
0
0
0
11010100
Rm
cond
0
1
Rn
Rd
 
Format Cond Select
Opcode 0x1A800400
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    True Src
  • Wm
    False Src
  • cond
    Cond

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x1A800400 CSINC <Wd>, <Wn>, <Wm>, <cond> A64 0 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd
0x9A800400 CSINC <Xd>, <Xn>, <Xm>, <cond> A64 1 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd

Description

Conditional Select Increment returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register incremented by 1.

Operation

bits(datasize) result;
if ConditionHolds(cond) then
    result = X[n, datasize];
else
    result = X[m, datasize];
    result = result + 1;

X[d, datasize] = result;