tbh

Table Branch Halfword

TBH [<Rn>, <Rm>, LSL #1]

PC-relative branch using a table of halfwords.

Pseudocode Operation

address ← Rn + (Rm << 1)
table_entry ← ZeroExtend([address], 16)
PC ← PC + 4 + (table_entry << 1)

Example

TBH [r1, r2, LSL #1]

Encoding

Binary Layout

111010001101

31:20

Rn

19:16

1

15

1

14

1

13

1

12

0

11

0

10

0

9

0

8

000

7:5

1

4

Rm

3:0

 

Format Thumb Branch

Opcode 0xE8D0F010

Extension T32 (Thumb)

Operands

• Rn
  Table Base
• Rm
  Index

Related

More in T32 (Thumb)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xE8D0F010	TBH{<c>}{<q>} [<Rn>, <Rm>, LSL #1]		T32		111010001101 | Rn | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 000 | 1 | Rm

Description

Table Branch Byte or Halfword causes a PC-relative forward branch using a table of single byte or halfword offsets. A base register provides a pointer to the table, and a second register supplies an index into the table. The branch length is twice the value returned from the table.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    integer halfwords;
    if is_tbh then
        halfwords = UInt(MemU[R[n]+LSL(R[m],1), 2]);
    else
        halfwords = UInt(MemU[R[n]+R[m], 1]);
    BranchWritePC(PC + 2*halfwords, BranchType_INDIR);