vrintz

Vector Round Floating-Point (Zero)

VRINTZ<c>.F32 <Qd>, <Qm>

Rounds float to integral float (Towards Zero).

Details

The Vector Round Floating-Point instruction rounds float to integral float (Towards Zero).

Pseudocode Operation

// Rounds float to integral float (Towards Zero)

Example

VRINTZ.F32 q0, q2

Encoding

Binary Layout
11110011
1
D
11
10
00
Vd
00011
Q
M
0
Vm
 
Format NEON 2-Reg
Opcode 0xF3BA0180
Extension NEON (SIMD)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register