fneg
Floating-Point Negate (Half-Precision)
FNEG <Vd>.8H, <Vn>.8H
Negates half-precision vector.
Details
The Floating-Point Negate instruction negates half-precision vector.
Pseudocode Operation
Vd ← -Vn
Example
FNEG v0.4s.8H, v1.4s.8H
Encoding
Binary Layout
01101110
111
11000
01111
0
Vn
Vd
Operands
-
Vd
Destination SIMD/FP vector register -
Vn
First source SIMD/FP vector register