vfma

Vector Fused Multiply Accumulate (Double)

VFMA<c>.F64 <Qd>, <Qn>, <Qm>

Fused multiply-add (Double).

Details

The Vector Fused Multiply Accumulate instruction fused multiply-add (Double).

Pseudocode Operation

// Fused multiply-add (Double)

Example

VFMA.F64 q0, q1, q2

Encoding

Binary Layout
cond
11101010
0
D
Vn
Vd
1011
N
0
M
Vm
 
Format VFP Arith
Opcode 0x0EA00B00
Extension VFPv4 (Float)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qn
    First source 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register