usada8

Unsigned Sum of Absolute Differences Accumulate

USADA8<c> <Rd>, <Rn>, <Rm>, <Ra>

USAD8 plus accumulator.

Pseudocode Operation

diff0 ← |Rn[7:0] - Rm[7:0]|
diff1 ← |Rn[15:8] - Rm[15:8]|
diff2 ← |Rn[23:16] - Rm[23:16]|
diff3 ← |Rn[31:24] - Rm[31:24]|
Rd ← (diff0 + diff1 + diff2 + diff3) + Ra

Example

USADA8 r0, r1, r2, r5

Encoding

Binary Layout

cond

31:28

01111000

27:20

Rd

19:16

Ra

15:12

Rm

11:8

0001

7:4

Rn

3:0

 

Format SIMD Integer

Opcode 0x07800010

Extension A32 (DSP)

Operands

• Rd
  Destination general-purpose register
• Rn
  First source / base general-purpose register
• Rm
  Second source / offset general-purpose register
• Ra
  Acc

Related

More in A32 (DSP)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x07800010	USADA8{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra>		A32		cond | 01111000 | Rd | Ra | Rm | 0001 | Rn
0xFB700000	USADA8{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra>		T32		111110110 | 111 | Rn | Ra | Rd | 00 | 00 | Rm

Description

Unsigned Sum of Absolute Differences and Accumulate performs four unsigned 8-bit subtractions, and adds the absolute values of the differences to a 32-bit accumulate operand.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    absdiff1 = Abs(UInt(R[n]<7:0>)   - UInt(R[m]<7:0>));
    absdiff2 = Abs(UInt(R[n]<15:8>)  - UInt(R[m]<15:8>));
    absdiff3 = Abs(UInt(R[n]<23:16>) - UInt(R[m]<23:16>));
    absdiff4 = Abs(UInt(R[n]<31:24>) - UInt(R[m]<31:24>));
    result = UInt(R[a]) + absdiff1 + absdiff2 + absdiff3 + absdiff4;
    R[d] = result<31:0>;