cinc

Conditional Increment

CINC <Wd>, <Wn>, <cond>

Increment register if condition is true, else copy. (Alias for CSINC)

Pseudocode Operation

if ConditionHolds(cond) then Wd ← Wn + 1 else Wd ← Wn

Example

CINC w0, w1, cond

Encoding

Binary Layout

0

31

0

30

0

29

11010100

28:21

Rm

20:16

cond

15:12

0

11

1

10

Rn

9:5

Rd

4:0

 

Format Cond Select

Opcode 0x1A800400

Extension Base

Operands

• Wd
  Destination 32-bit integer register
• Wn
  First source / base 32-bit integer register
• cond
  Condition

Related

More in Base

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x1A800400	CINC <Wd>, <Wn>, <invcond>		A64		0 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd
0x9A800400	CINC <Xd>, <Xn>, <invcond>		A64		1 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd

Description

Conditional Increment returns, in the destination register, the value of the source register incremented by 1 if the condition is TRUE, and otherwise returns the value of the source register.