cinc

Conditional Increment

CINC <Wd>, <Wn>, <cond>

Increment register if condition is true, else copy. (Alias for CSINC)

Details

Conditional Increment, 32-bit. An alias for CSINC that conditionally increments Wn by 1 and writes the result to Wd if the condition is true, otherwise copies Wn to Wd. This instruction does not affect the condition flags. AArch64-only instruction.

Pseudocode Operation

if ConditionHolds(cond) then Wd ← Wn + 1 else Wd ← Wn

Example

CINC w0, w1, cond

Encoding

Binary Layout
0
0
0
11010100
Rm
cond
0
1
Rn
Rd
 
Format Cond Select
Opcode 0x1A800400
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register
  • cond
    Condition

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x1A800400 CINC <Wd>, <Wn>, <invcond> A64 0 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd
0x9A800400 CINC <Xd>, <Xn>, <invcond> A64 1 | 0 | 0 | 11010100 | Rm | cond | 0 | 1 | Rn | Rd

Description

Conditional Increment returns, in the destination register, the value of the source register incremented by 1 if the condition is TRUE, and otherwise returns the value of the source register.