abs

ABS <Wd>, <Wn>

Absolute Value.

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout
0
31
1
30
0
29
11010110
28:21
00000
20:16
001000
15:10
Rn
9:5
Rd
4:0
 
Format CSSC
Opcode 0x5AC02000
Extension CSSC

Related

Other forms of abs

  • abs SVE Absolute Value
  • abs Vector Absolute Value

More in CSSC

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0x5AC02000 ABS <Wd>, <Wn> A64 0 | 1 | 0 | 11010110 | 00000 | 001000 | Rn | Rd
0xDAC02000 ABS <Xd>, <Xn> A64 1 | 1 | 0 | 11010110 | 00000 | 001000 | Rn | Rd
0x5EE0B800 ABS D<d>, D<n> A64 01 | 0 | 11110 | 11 | 10000 | 01011 | 10 | Rn | Rd
0x0E20B800 ABS <Vd>.<T>, <Vn>.<T> A64 0 | Q | 0 | 01110 | size | 10000 | 01011 | 10 | Rn | Rd
0x0416A000 ABS <Zd>.<T>, <Pg>/M, <Zn>.<T> A64 00000100 | size | 010 | 11 | 0 | 101 | Pg | Zn | Zd

Description

Absolute value computes the absolute value of the signed integer value in the source register, and writes the result to the destination register.

Operation

bits(datasize) operand1 = X[n, datasize];
integer result = Abs(SInt(operand1));
X[d, datasize] = result<datasize-1:0>;