ADD
Add Integer
ADD rd, rs1, rs2
Adds the contents of two registers.
Encoding
Binary Layout
0000000
31:25
rs2
24:20
rs1
19:15
000
14:12
rd
11:7
0110011
6:0
Operands
-
rd
Destination Register -
rs1
Source Register 1 -
rs2
Source Register 2
Example
ADD x10, x11, x12
// Computes x11 + x12 and stores the result in x10.
Related
Across architectures
Integer Addition : how x86, ARM, RISC-V, and PowerISA each do this.
More in RV32I
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
ADD performs an XLEN-bit addition of the values in registers rs1 and rs2, writing the result to rd. Arithmetic overflow is ignored; the result is simply the low XLEN bits of the mathematical sum.
Operation
R[rd] = R[rs1] + R[rs2];