HFENCE.VVMA

Hypervisor Fence Virtual Virtual Memory Address

HFENCE.VVMA rs1, rs2

Synchronizes updates to VS-stage address translation data structures.

Encoding

Binary Layout

0010001

31:25

rs2

24:20

rs1

19:15

000000001110011

14:0

 

Format R-Type

Opcode 0x22000073

Extension H

Operands

• rs1
  Virtual Address (optional)
• rs2
  ASID (optional)

Example

HFENCE.VVMA x10, x0

// Flush TLB entries for address in x10.

Related

More in H

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

HFENCE.VVMA orders implicit reads and writes to VS-stage page tables for the current VMID. rs1 optionally restricts to a virtual address; rs2 to an ASID.

Operation

Fence(VS-StagePageTable);