RISC-V Instructions
547 instructions - showing 100 per page, page 1 of 6 - click any row to view encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Extension | Summary |
|---|---|---|---|---|
| ADD | ADD rd, rs1, rs2 | R-Type | RV32I | Adds the contents of two registers. |
| ADD.UW | ADD.UW rd, rs1, rs2 | R-Type | Zba | Zero-extends the lower 32 bits of rs1 and adds it to rs2. Useful for 64-bit address calculations with 32-bit unsigned indices. |
| ADDI | ADDI rd, rs1, imm | I-Type | RV32I | Adds a register and a sign-extended 12-bit immediate value. |
| ADDIW | ADDIW rd, rs1, imm | I-Type | RV64I | Adds a 12-bit immediate to a register (32-bit arithmetic) and sign-extends to 64 bits. |
| ADDW | ADDW rd, rs1, rs2 | R-Type | RV64I | Adds two 32-bit registers and sign-extends the result to 64 bits. |
| AES64DS | AES64DS rd, rs1, rs2 | R-Type | Zknd | Performs one round of AES-128 decryption key schedule generation. |
| AES64ES | AES64ES rd, rs1, rs2 | R-Type | Zkne | Performs one round of AES-128 encryption key schedule generation. |
| AES64IM | AES64IM rd, rs1 | R-Type | Zknd | Performs the Inverse MixColumns transformation for AES decryption (RV64). |
| AES64KS1I | AES64KS1I rd, rs1, rcon | I-Type | Zkne | Performs the first part of the AES-128/192/256 key schedule generation (RV64). |
| AES64KS2 | AES64KS2 rd, rs1, rs2 | R-Type | Zkne | Performs the second part of the AES-192/256 key schedule generation (RV64). |
| AMOADD.D | AMOADD.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically adds a value to a 64-bit doubleword in memory. |
| AMOADD.W | AMOADD.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically adds a value to a word in memory. |
| AMOAND.D | AMOAND.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise AND on a 64-bit doubleword in memory. |
| AMOAND.W | AMOAND.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise AND on a word in memory. |
| AMOCAS.D | AMOCAS.D rd, rs2, (rs1) | R-Type (Atomic) | Zacas | Atomically compares 64-bit memory at rs1 with rd; if equal, writes rs2 to memory. |
| AMOCAS.W | AMOCAS.W rd, rs2, (rs1) | R-Type (Atomic) | Zacas | Atomically compares memory at rs1 with rd; if equal, writes rs2 to memory. Returns original value in rd. |
| AMOMAX.D | AMOMAX.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the maximum of the memory value and register value (64-bit Signed). |
| AMOMAX.W | AMOMAX.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the maximum of the memory value and register value (Signed). |
| AMOMAXU.D | AMOMAXU.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the maximum of the memory value and register value (Unsigned 64-bit). |
| AMOMAXU.W | AMOMAXU.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the maximum of the memory value and register value (Unsigned). |
| AMOMIN.D | AMOMIN.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the minimum of the memory value and register value (64-bit Signed). |
| AMOMIN.W | AMOMIN.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the minimum of the memory value and register value (Signed). |
| AMOMINU.D | AMOMINU.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the minimum of the memory value and register value (Unsigned 64-bit). |
| AMOMINU.W | AMOMINU.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically updates memory with the minimum of the memory value and register value (Unsigned). |
| AMOOR.D | AMOOR.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise OR on a 64-bit doubleword in memory. |
| AMOOR.W | AMOOR.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise OR on a word in memory. |
| AMOSWAP.D | AMOSWAP.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically swaps a 64-bit value in memory with a register. |
| AMOSWAP.W | AMOSWAP.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically swaps a value in memory with a register. |
| AMOXOR.D | AMOXOR.D rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise XOR on a 64-bit doubleword in memory. |
| AMOXOR.W | AMOXOR.W rd, rs2, (rs1) | R-Type (Atomic) | A | Atomically performs bitwise XOR on a word in memory. |
| AND | AND rd, rs1, rs2 | R-Type | RV32I | Performs a bitwise logical AND operation between two registers. |
| ANDI | ANDI rd, rs1, imm | I-Type | RV32I | Performs a bitwise logical AND between a register and a sign-extended 12-bit immediate. |
| ANDN | ANDN rd, rs1, rs2 | R-Type | Zbb | Performs bitwise AND with the bitwise negation of rs2 (rs1 & ~rs2). |
| AUIPC | AUIPC rd, imm | U-Type | RV32I | Adds a 20-bit upper immediate to the Program Counter, used for PC-relative addressing. |
| BCLR | BCLR rd, rs1, rs2 | R-Type | Zbs | Clears a single bit in rs1 at the index specified by rs2. |
| BCLRI | BCLRI rd, rs1, imm | I-Type | Zbs | Clears a single bit in rs1 at the index specified by an immediate. |
| BEQ | BEQ rs1, rs2, offset | B-Type | RV32I | Take the branch if registers rs1 and rs2 are equal. |
| BEQZ | BEQZ rs, offset | B-Type | Pseudo | Branches if the register is zero. |
| BEXT | BEXT rd, rs1, rs2 | R-Type | Zbs | Extracts the value of a single bit (0 or 1) at the index specified by rs2. The result is placed in the LSB of rd. |
| BEXTI | BEXTI rd, rs1, imm | I-Type | Zbs | Extracts the value of a single bit (0 or 1) at the index specified by an immediate. |
| BGE | BGE rs1, rs2, offset | B-Type | RV32I | Take the branch if rs1 is greater than or equal to rs2 (signed). |
| BGEU | BGEU rs1, rs2, offset | B-Type | RV32I | Take the branch if rs1 is greater than or equal to rs2 (unsigned comparison). |
| BINV | BINV rd, rs1, rs2 | R-Type | Zbs | Inverts (toggles) a single bit in rs1 at the index specified by rs2. |
| BINVI | BINVI rd, rs1, imm | I-Type | Zbs | Inverts (toggles) a single bit in rs1 at the index specified by an immediate. |
| BLT | BLT rs1, rs2, offset | B-Type | RV32I | Take the branch if rs1 is less than rs2 (signed). |
| BLTU | BLTU rs1, rs2, offset | B-Type | RV32I | Take the branch if rs1 is less than rs2 (unsigned comparison). |
| BNE | BNE rs1, rs2, offset | B-Type | RV32I | Take the branch if registers rs1 and rs2 are not equal. |
| BNEZ | BNEZ rs, offset | B-Type | Pseudo | Branches if the register is not zero. |
| BSET | BSET rd, rs1, rs2 | R-Type | Zbs | Sets a single bit in rs1 at the index specified by rs2. |
| BSETI | BSETI rd, rs1, imm | I-Type | Zbs | Sets a single bit in rs1 at the index specified by an immediate. |
| C.ADD | C.ADD rd, rs2 | CR | C | Adds two registers. |
| C.ADDI | C.ADDI rd, imm | CI | C | Adds a non-zero immediate to a register. |
| C.ADDI16SP | C.ADDI16SP imm | CI | C | Adds a signed non-zero immediate to the stack pointer (x2). |
| C.ADDI4SPN | C.ADDI4SPN rd', uimm | CIW | C | Adds a zero-extended non-zero immediate to the stack pointer (x2) and stores the result in a register. |
| C.ADDIW | C.ADDIW rd, imm | CI | C | Adds a signed immediate to a register (32-bit result sign-extended, RV64). |
| C.ADDW | C.ADDW rd', rs2' | CA | C | Adds two registers (32-bit result sign-extended, RV64). |
| C.AND | C.AND rd', rs2' | CA | C | Bitwise AND of two registers. |
| C.ANDI | C.ANDI rd', imm | CB | C | Computes bitwise AND with a signed immediate. |
| C.BEQZ | C.BEQZ rs1', offset | CB | C | Branches if the register is zero. |
| C.BNEZ | C.BNEZ rs1', offset | CB | C | Branches if the register is not zero. |
| C.EBREAK | C.EBREAK | CR | C | Triggers a debugger breakpoint. |
| C.FLD | C.FLD rd', offset(rs1') | CL | C | Loads a double-precision float from memory (Compressed). |
| C.FLDSP | C.FLDSP rd, offset(x2) | CI | C | Loads a double-precision float from the stack pointer. |
| C.FLW | C.FLW rd', offset(rs1') | CL | C | Loads a single-precision float from memory (Compressed). |
| C.FLWSP | C.FLWSP rd, offset(x2) | CI | C | Loads a single-precision float from the stack pointer. |
| C.FSD | C.FSD rs2', offset(rs1') | CS | C | Stores a double-precision float to memory (Compressed). |
| C.FSDSP | C.FSDSP rs2, offset(x2) | CSS | C | Stores a double-precision float to the stack pointer. |
| C.FSW | C.FSW rs2', offset(rs1') | CS | C | Stores a single-precision float to memory (Compressed). |
| C.FSWSP | C.FSWSP rs2, offset(x2) | CSS | C | Stores a single-precision float to the stack pointer. |
| C.J | C.J offset | CJ | C | Unconditional PC-relative jump. |
| C.JAL | C.JAL offset | CJ | C | Performs a PC-relative jump and stores return address in x1 (ra). RV32 only. |
| C.JALR | C.JALR rs1 | CR | C | Jumps to register address and links (saves PC+2 to ra). |
| C.JR | C.JR rs1 | CR | C | Unconditionally jumps to address in register. |
| C.LD | C.LD rd', offset(rs1') | CL | C | Loads a 64-bit value from memory (Compressed, RV64). |
| C.LDSP | C.LDSP rd, offset(x2) | CI | C | Loads a 64-bit value from the stack pointer (RV64). |
| C.LI | C.LI rd, imm | CI | C | Loads a 6-bit signed immediate into a register. |
| C.LUI | C.LUI rd, imm | CI | C | Loads a non-zero 6-bit immediate into bits 17-12 of the destination register, clears lower 12 bits, sign-extends bit 17. |
| C.LW | C.LW rd', offset(rs1') | CL | C | Loads a 32-bit word from memory using a compressed encoding. |
| C.LWSP | C.LWSP rd, offset(x2) | CI | C | Loads a word from the stack pointer (x2). |
| C.MUL | C.MUL rd', rs2' | CA | Zcb | Performs 32-bit multiplication (rd = rd * rs2) in 16-bit encoding. |
| C.MV | C.MV rd, rs2 | CR | C | Copies register rs2 to rd. |
| C.NOP | C.NOP | CI | C | Performs no operation (Compressed encoding). |
| C.NOT | C.NOT rd' | CR | Zcb | Computes bitwise logical negation. |
| C.OR | C.OR rd', rs2' | CA | C | Bitwise OR of two registers. |
| C.SD | C.SD rs2', offset(rs1') | CS | C | Stores a 64-bit value to memory (Compressed, RV64). |
| C.SDSP | C.SDSP rs2, offset(x2) | CSS | C | Stores a 64-bit value to the stack pointer (RV64). |
| C.SEXT.B | C.SEXT.B rd' | CR | Zcb | Sign extends the lowest byte of rd' to XLEN. |
| C.SLLI | C.SLLI rd, imm | CI | C | Logically shifts a register left by immediate. |
| C.SRAI | C.SRAI rd', imm | CB | C | Arithmetically shifts a register right by immediate. |
| C.SRLI | C.SRLI rd', imm | CB | C | Logically shifts a register right by immediate. |
| C.SUB | C.SUB rd', rs2' | CA | C | Subtracts two registers. |
| C.SUBW | C.SUBW rd', rs2' | CA | C | Subtracts two registers (32-bit result sign-extended, RV64). |
| C.SW | C.SW rs2', offset(rs1') | CS | C | Stores a 32-bit word to memory using a compressed encoding. |
| C.SWSP | C.SWSP rs2, offset(x2) | CSS | C | Stores a word to the stack pointer (x2). |
| C.XOR | C.XOR rd', rs2' | CA | C | Bitwise XOR of two registers. |
| C.ZEXT.B | C.ZEXT.B rd' | CR | Zcb | Zero extends the lowest byte of rd' to XLEN. |
| CALL | CALL symbol | Pseudo | Pseudo | Calls a function by jumping to an address and saving the return address. |
| CBO.CLEAN | CBO.CLEAN (rs1) | I-Type | Zicbom | Performs a clean operation on the cache block containing the effective address. |
| CBO.FLUSH | CBO.FLUSH (rs1) | I-Type | Zicbom | Performs a flush (clean + invalidate) operation on the cache block. |
| CBO.INVAL | CBO.INVAL (rs1) | I-Type | Zicbom | Performs an invalidate operation on the cache block. |