CSRRC
Control Status Register Read and Clear
CSRRC rd, csr, rs1
Reads the old value of the CSR, then clears bits in the CSR based on the mask in rs1.
Encoding
Binary Layout
csr
31:20
rs1
19:15
011
14:12
rd
11:7
1110011
6:0
Operands
-
rd
Dest (Old Value) -
csr
CSR Address -
rs1
Bit Mask
Example
CSRRC x10, sstatus, x5
// Clears bits in 'sstatus' where x5 is 1.
Related
More in Zicsr
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
CSRRC atomically reads CSR csr into rd, then clears the bits in the CSR that correspond to bits set in rs1. If rs1 is x0, no bits are modified.
Operation
t = CSRs[csr]; CSRs[csr] = t & ~R[rs1]; R[rd] = t;