System Instructions
13 ARM instructions in this extension - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| at | AT <op>, <Xt> | System Alias | Translates a virtual address to a physical address (for debug/software). |
| dc | DC <op>, <Xt> | System Alias | Performs data cache maintenance (Clean, Invalidate, Flush). |
| dcps1 | DCPS1 {#<imm>} | Exception | Switch to Exception Level 1 (Debug). |
| dcps2 | DCPS2 {#<imm>} | Exception | Switch to Exception Level 2 (Debug). |
| dcps3 | DCPS3 {#<imm>} | Exception | Switch to Exception Level 3 (Debug). |
| drps | DRPS | System | Restores state from SPSR_ELx and DLR_EL0. |
| hvc | HVC #<imm> | Exception | Generates a Hypervisor Call exception to EL2. |
| ic | IC <op> {, <Xt>} | System Alias | Performs instruction cache maintenance. |
| mrs | MRS <Xt>, <system_reg> | System | Moves system register to general-purpose register. |
| msr | MSR <system_reg>, <Xt> | System | Moves general-purpose register to system register. |
| svc | SVC #<imm> | Exception | Causes a Supervisor Call exception (to EL1). |
| sys | SYS #<op1>, Cn, Cm, #<op2> {, <Xt>} | System | Executes a system instruction (cache/TLB maintenance). |
| tlbi | TLBI <op> {, <Xt>} | System Alias | Invalidates Translation Lookaside Buffer entries. |