SSE Instructions

46 x86 instructions in this extension - click any row for encoding, pseudocode, and full documentation.

Mnemonic ⇅	Syntax	Format ⇅	Summary
addps	ADDPS xmm, xmm/m128	SSE	Adds four 32-bit floats.
addss	ADDSS xmm, xmm/m32	SSE	Adds the low 32-bit float.
andps	ANDPS xmm, xmm/m128	SSE	Bitwise AND of 128 bits.
cmpss	CMPSS xmm1, xmm2/m32, imm8	SSE	Compares low single-precision values and returns mask.
comiss	COMISS xmm1, xmm2/m32	SSE	Compares low float and sets EFLAGS (Signaling NaN raises exception).
cvtsi2ss	CVTSI2SS xmm, r/m32	SSE	Converts 32-bit int to float.
cvtss2si	CVTSS2SI r32, xmm/m32	SSE	Converts low float to integer (Rounded according to MXCSR).
cvttps2pi	CVTTPS2PI mm, xmm/m64	SSE	Converts packed floats to packed MMX integers (Truncate).
cvttss2si	CVTTSS2SI r32, xmm/m32	SSE	Converts float to 32-bit int (Truncate).
divps	DIVPS xmm, xmm/m128	SSE	Divides four 32-bit floats.
divss	DIVSS xmm1, xmm2/m32	SSE	Divides the low single-precision floating-point value.
ldmxcsr	LDMXCSR m32	SSE	Loads the MXCSR control/status register from memory.
maxps	MAXPS xmm, xmm/m128	SSE	Returns maximum of packed floats.
maxss	MAXSS xmm1, xmm2/m32	SSE	Returns the maximum of two low single-precision values.
minps	MINPS xmm, xmm/m128	SSE	Returns minimum of packed floats.
minss	MINSS xmm1, xmm2/m32	SSE	Returns the minimum of two low single-precision values.
movaps	MOVAPS xmm, xmm/m128	SSE	Moves 128-bit packed float data (Must be 16-byte aligned).
movmskps	MOVMSKPS r32, xmm	SSE	Extracts sign bits from four floats into low 4 bits of register.
movntps	MOVNTPS m128, xmm	SSE	Stores float vectors directly to RAM, bypassing cache.
movntq	MOVNTQ m64, mm	SSE	Stores 64-bit MMX data bypassing cache.
movss	MOVSS xmm1, xmm2/m32	SSE	Moves a single float (low 32 bits) between XMM/Memory.
movups	MOVUPS xmm, xmm/m128	SSE	Moves 128-bit packed float data (Unaligned).
mulps	MULPS xmm, xmm/m128	SSE	Multiplies four 32-bit floats.
mulss	MULSS xmm1, xmm2/m32	SSE	Multiplies the low single-precision floating-point value.
orps	ORPS xmm, xmm/m128	SSE	Bitwise OR of 128 bits.
pextrw	PEXTRW r32, xmm1, imm8	SSE	Extracts a word from XMM to integer register.
pinsrw	PINSRW xmm1, r32/m16, imm8	SSE	Inserts a word from integer register into XMM.
prefetchnta	PREFETCHNTA m8	SSE	Prefetches data to non-temporal cache structure (minimize pollution).
prefetcht0	PREFETCHT0 m8	SSE	Prefetches data to L1 cache.
prefetcht1	PREFETCHT1 m8	SSE	Hints to fetch data to L2 and L3 caches.
prefetcht2	PREFETCHT2 m8	SSE	Hints to fetch data to L3 cache only.
rcpps	RCPPS xmm, xmm/m128	SSE	Approximate reciprocal (1/x) of four 32-bit floats.
rcpss	RCPSS xmm1, xmm2/m32	SSE	Computes approximate reciprocal (1/x) of low float.
rsqrtps	RSQRTPS xmm, xmm/m128	SSE	Approximate reciprocal sqrt (1/sqrt(x)) of four 32-bit floats.
rsqrtss	RSQRTSS xmm1, xmm2/m32	SSE	Computes approximate reciprocal sqrt (1/sqrt(x)) of low float.
sfence	SFENCE	SSE	Serializes store operations (Wait for prior stores to complete).
shufps	SHUFPS xmm1, xmm2/m128, imm8	SSE	Shuffles 32-bit floats between two XMM registers.
sqrtps	SQRTPS xmm, xmm/m128	SSE	Computes square root of four 32-bit floats.
sqrtss	SQRTSS xmm1, xmm2/m32	SSE	Computes square root of the low float.
stmxcsr	STMXCSR m32	SSE	Stores the MXCSR register to memory.
subps	SUBPS xmm, xmm/m128	SSE	Subtracts four 32-bit floats.
subss	SUBSS xmm1, xmm2/m32	SSE	Subtracts the low single-precision floating-point value.
ucomiss	UCOMISS xmm1, xmm2/m32	SSE	Compares low float and sets EFLAGS.
unpckhps	UNPCKHPS xmm1, xmm2/m128	SSE	Interleaves high floats from two registers.
unpcklps	UNPCKLPS xmm1, xmm2/m128	SSE	Interleaves low floats from two registers.
xorps	XORPS xmm, xmm/m128	SSE	Bitwise XOR of 128 bits (Used to clear registers).