ucomiss
Unordered Compare Scalar Single-Precision
UCOMISS xmm1, xmm2/m32
Compares low float and sets EFLAGS.
Details
Performs an unordered comparison of two single-precision floating-point values and sets EFLAGS (ZF, PF, CF) based on the result. If either operand is a signaling NaN, the comparison is treated as unordered; quiet NaNs also produce an unordered result. EFLAGS are set such that ZF=1, PF=1, CF=1 for unordered, ZF=0 for less, ZF=0 CF=1 for greater, and ZF=1 for equal.
Pseudocode Operation
cmp_result ← unordered_compare(dest.low32_float, src.low32_float); ZF ← (cmp_result == equal); PF ← (cmp_result == unordered); CF ← (cmp_result == less || cmp_result == unordered); AF ← 0; OF ← 0; SF ← 0;Example
UCOMISS xmm1, xmm2/m32
Encoding
Binary Layout
0F
+0
2E
+1
Operands
-
dest
128-bit XMM SIMD register -
src
128-bit XMM SIMD register or Memory operand
Reference (Intel® SDM)
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| NP 0F 2E /r | UCOMISS xmm1, xmm2/m32 | A | V/V | SSE | Compare low single precision floating-point values in xmm1 and xmm2/mem32 and set the EFLAGS flags accordingly. |
| VEX.LIG.0F.WIG 2E /r | VUCOMISS xmm1, xmm2/m32 | A | V/V | AVX | Compare low single precision floating-point values in xmm1 and xmm2/mem32 and set the EFLAGS flags accordingly. |
| EVEX.LLIG.0F.W0 2E /r | VUCOMISS xmm1, xmm2/m32{sae} | B | V/V | AVX512F OR AVX10.1 | Compare low single precision floating-point values in xmm1 and xmm2/mem32 and set the EFLAGS flags accordingly. |
Instruction Operand Encoding
| Op/En | Tuple Type | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
|---|---|---|---|---|---|
| A | N/A | ModRM:reg (r) | ModRM:r/m (r) | N/A | N/A |
| B | Tuple1 Scalar | ModRM:reg (w) | ModRM:r/m (r) | N/A | N/A |
Description
Compares the single precision floating-point values in the low doublewords of operand 1 (first operand) and operand 2 (second operand), and sets the ZF, PF, and CF flags in the EFLAGS register according to the result (unordered, greater than, less than, or equal). The OF, SF, and AF flags in the EFLAGS register are set to 0. The unordered result is returned if either source operand is a NaN (QNaN or SNaN).
Operand 1 is an XMM register; operand 2 can be an XMM register or a 32 bit memory location.
The UCOMISS instruction differs from the COMISS instruction in that it signals a SIMD floating-point invalid operation exception (#I) only if a source operand is an SNaN. The COMISS instruction signals an invalid operation exception when a source operand is either a QNaN or SNaN.
The EFLAGS register is not updated if an unmasked SIMD floating-point exception is generated.
Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.
Software should ensure VCOMISS is encoded with VEX.L=0. Encoding VCOMISS with VEX.L=1 may encounter unpredictable behavior across different processor generations.
Operation
(V)UCOMISS (All Versions)
RESULT := UnorderedCompare(DEST[31:0] <> SRC[31:0]) {
(* Set EFLAGS *) CASE (RESULT) OF
UNORDERED: ZF,PF,CF := 111;
GREATER_THAN: ZF,PF,CF := 000;
LESS_THAN: ZF,PF,CF := 001;
EQUAL: ZF,PF,CF := 100;
ESAC;
OF, AF, SF := 0; }Intel C/C++ Compiler Intrinsic Equivalent
VUCOMISS int _mm_comi_round_ss(__m128 a, __m128 b, int imm, int sae); UCOMISS int _mm_ucomieq_ss(__m128 a, __m128 b); UCOMISS int _mm_ucomilt_ss(__m128 a, __m128 b); UCOMISS int _mm_ucomile_ss(__m128 a, __m128 b); UCOMISS—Unordered Compare Scalar Single Precision Floating-Point Values and Set EFLAGS Vol. 2B 4-734 UCOMISS int _mm_ucomigt_ss(__m128 a, __m128 b); UCOMISS int _mm_ucomige_ss(__m128 a, __m128 b); UCOMISS int _mm_ucomineq_ss(__m128 a, __m128 b);
Exceptions
SIMD Floating-Point Exceptions
Invalid (if SNaN Operands), Denormal.
Other Exceptions
VEX-encoded instructions, see Table 2-20, “Type 3 Class Exception Conditions,” additionally:
#UD If VEX.vvvv != 1111B.
EVEX-encoded instructions, see Table 2-50, “Type E3NF Class Exception Conditions.”
UCOMISS—Unordered Compare Scalar Single Precision Floating-Point Values and Set EFLAGS Vol. 2B 4-735