clac
Clear AC Flag in EFLAGS
CLAC
Clears Alignment Check flag (SMAP prevention).
Details
Clears the Alignment Check (AC) flag in EFLAGS, disabling alignment checking for user-mode code. When combined with SMAP (Supervisor Mode Access Prevention), this instruction allows the kernel to temporarily disable SMAP protections. This is a privileged instruction (CPL 0 only) available with the SMAP extension. No other flags are affected.
Pseudocode Operation
EFLAGS.AC ← 0;Example
CLAC
Encoding
Binary Layout
0F
+0
01
+1
CA
+2
Operands
Reference (Intel® SDM)
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| NP 0F 01 CA | CLAC | ZO | V/V | SMAP | Clear the AC flag in the EFLAGS register. |
Description
Clears the AC flag bit in EFLAGS register. This disables any alignment checking of user-mode data accesses. If the
SMAP bit is set in the CR4 register, this disallows explicit supervisor-mode data accesses to user-mode pages.
This instruction's operation is the same in non-64-bit modes and 64-bit mode. Attempts to execute CLAC when
CPL > 0 cause #UD.
Operation
EFLAGS.AC := 0;
Flags Affected
AC cleared. Other flags are unaffected.
Exceptions
Protected Mode Exceptions
#UD If the LOCK prefix is used.
If the CPL > 0.
If CPUID.07H.00H:EBX.SMAP[20] = 0.
Real-Address Mode Exceptions
#UD If the LOCK prefix is used.
If CPUID.07H.00H:EBX.SMAP[20] = 0.
Virtual-8086 Mode Exceptions
#UD The CLAC instruction is not recognized in virtual-8086 mode.
Compatibility Mode Exceptions
#UD If the LOCK prefix is used.
If the CPL > 0.
If CPUID.07H.00H:EBX.SMAP[20] = 0.
64-Bit Mode Exceptions
#UD If the LOCK prefix is used.
If the CPL > 0.
If CPUID.07H.00H:EBX.SMAP[20] = 0.
CLAC—Clear AC Flag in EFLAGS Register Vol. 2A 3-139