vprotw

Vector Packed Rotate Word

VPROTW xmm1, xmm2/m128, imm8

Rotates words in XMM register.

Details

Rotates each 16-bit word within a 128-bit XMM register by the amount specified in the 8-bit signed immediate, with rotation direction determined by sign (positive = left rotate, negative = right rotate). This XOP vector instruction does not modify CPU flags.

Pseudocode Operation

for i in 0..7:
  if (imm8 >= 0):
    xmm1[i*16+15:i*16] ← ROL(src1[i*16+15:i*16], imm8 & 15)
  else:
    xmm1[i*16+15:i*16] ← ROR(src1[i*16+15:i*16], (-imm8) & 15)

Example

VPROTW xmm1, xmm2/m128, 3

Encoding

Binary Layout
VEX
+0
opcode
+3
ModRM
+4
 
Format XOP
Opcode XOP.128.08.W0 C1 /r ib
Extension XOP

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register or Memory operand
  • src2
    8-bit signed immediate

Reference (AMD APM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
8F RXB.09 0.count.0.00 91 /r VPROTW xmm1, xmm2/mem128, xmm3
8F RXB.09 1.src.0.00 91 /r VPROTW xmm1, xmm2, xmm3/mem128
8F RXB.08 0.1111.0.00 C1 /r ib VPROTW xmm1, xmm2/mem128, imm8

Description

Words Rotates each word of the source as specified by a count operand and writes the result to the corresponding word of the destination. There are two versions of the instruction, one for each source of the count byte: • VPROTW dest, src, fixed-count • VPROTW dest, src, variable-count For both versions of the instruction, the dest operand is an XMM register specified by ModRM.reg. The fixed count version of the instruction rotates each word of the source the number of bits specified by the immediate fixed-count byte operand. All words of the source operand are rotated the same amount. The src XMM register or memory location is selected by the ModRM.r/m field. The variable count version of this instruction rotates each word of the source operand by the amount specified in the low order byte of the corresponding word of the variable-count operand. Both src and variable-count are configured by XOP.W. • When XOP.W = 0, src is either an XMM register or a 128-bit memory location specified by ModRM.r/m and variable-count is an XMM register specified by XOP.vvvv. • When XOP.W = 1, src is an XMM register specified by XOP.vvvv and variable-count is either an XMM register or a 128-bit memory location specified by ModRM.r/m. When the count value is positive, bits are rotated to the left (toward the more significant bit positions). The bits rotated out to the left of the most significant bit of an element are rotated back in at the right end (least-significant bit) of the word element. When the count value is negative, bits are rotated to the right (toward the least significant bit positions) of the element. The bits rotated to the right out of the least significant bit of an element are rotated back in at the left end (most-significant bit) of the word element. Bits [255:128] of the YMM register that corresponds to the destination are cleared.

Flags Affected

None None

Exceptions

Exceptions

Mode Exception Cause of Exception Real Virt Prot X Instruction not supported, as indicated by CPUID feature identifier. X X XOP instructions are only recognized in protected mode. X CR4.OSXSAVE = 0, indicated by CPUID Fn0000_0001_ECX[OSXSAVE]. X XFEATURE_ENABLED_MASK[2:1] ! = 11b. Invalid opcode, #UD X XOP.vvvv ! = 1111b (for immediate operand variant only) X XOP.L field = 1. X REX, F2, F3, or 66 prefix preceding XOP prefix. X Lock prefix (F0h) preceding opcode. Device not available, #NM X CR0.TS = 1. Stack, #SS X Memory address exceeding stack segment limit or non-canonical. X Memory address exceeding data segment limit or non-canonical. General protection, #GP X Null data segment used to reference memory. Page fault, #PF X Instruction execution caused a page fault. Alignment check, #AC X Memory operand not 16-byte aligned when alignment checking enabled. X — XOP exception 828 [AMDVPROTWPublic Use] Instruction Reference