vpmacsww

Vector Packed Multiply Accumulate Signed Word

VPMACSWW xmm1, xmm2, xmm3, xmm4

Multiply-accumulate signed words.

Details

The Vector Packed Multiply Accumulate Signed Word instruction multiply-accumulate signed words.

Pseudocode Operation

// Multiply-accumulate signed words

Example

VPMACSWW xmm1, xmm2, xmm3, xmm4

Encoding

Binary Layout
VEX
+0
opcode
+3
ModRM
+4
 
Format XOP
Opcode 8F ... 83
Extension XOP

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register
  • src2
    128-bit XMM SIMD register
  • src3
    128-bit XMM SIMD register