vpmullq

Packed Multiply Low Quadword

VPMULLQ zmm1 {k1}, zmm2, zmm3/m512

Multiplies 64-bit integers and keeps low 64-bit result.

Details

The Packed Multiply Low Quadword instruction multiplies 64-bit integers and keeps low 64-bit result.

Pseudocode Operation

// Multiplies 64-bit integers and keeps low 64-bit result

Example

VPMULLQ zmm1, zmm2, zmm3/m512

Encoding

Binary Layout
EVEX
+0
66
+4
0F
+5
38
+6
40
+7
 
Format EVEX
Opcode 66 0F 38 40
Extension AVX-512DQ

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand