vmsave

Save State to VMCB

VMSAVE

Saves processor state to VMCB (AMD SVM).

Details

Saves the current processor state to the VMCB (Virtual Machine Control Block) at the address specified in RAX. This is a privileged SVM instruction that serializes the processor and must execute at privilege level 0. The instruction writes guest state registers and internal processor state to memory; it does not modify flags.

Pseudocode Operation

[RAX + offset] ← processor_state; // VMCB state save

Example

VMSAVE

Encoding

Binary Layout
0F
+0
01
+1
DB
+2
 
Format SVM
Opcode 0F 01 DB
Extension SVM

Operands

Reference (AMD APM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
0F 01 DB VMSAVE rAX Save additional guest state to VMCB.

Description

Stores a subset of the processor state into the VMCB specified by the system-physical address in the rAX register (the portion of RAX used to form the address is determined by the effective address size). The VMSAVE and VMLOAD instructions complement the state save/restore abilities of VMRUN and #VMEXIT, providing access to hidden state that software is otherwise unable to access, plus some additional commonly-used state. This is a Secure Virtual Machine (SVM) instruction. Support for the SVM architecture and the SVM instructions is indicated by CPUID Fn8000_0001_ECX[SVM] = 1. For more information on using the CPUID instruction, see the reference page for the CPUID instruction on page 165. This instruction generates a #UD exception if SVM is not enabled. See “Enabling SVM” in APM Volume 2. Instruction Encoding

Operation

IF ((MSR_EFER.SVME == 0) || (!PROTECTED_MODE))
EXCEPTION [#UD]      // This instruction can only be executed in protected
//  mode with SVM enabled
IF (CPL != 0)              // This instruction is only allowed at CPL 0
EXCEPTION [#GP]
IF (rAX contains an unsupported system-physical address)
EXCEPTION [#GP]
Store to a VMCB at system-physical address rAX:
FS, GS, TR, LDTR (including all hidden state)
KernelGsBase
STAR, LSTAR, CSTAR, SFMASK
SYSENTER_CS, SYSENTER_ESP, SYSENTER_EIP

Flags Affected

None. System Instruction Reference 497