vmulph

Multiply Packed FP16 Values

VMULPH zmm1 {k1}, zmm2, zmm3/m512

Multiplies half-precision floating-point values.

Details

The Multiply Packed FP16 Values instruction multiplies half-precision floating-point values.

Pseudocode Operation

// Multiplies half-precision floating-point values

Example

VMULPH zmm1, zmm2, zmm3/m512

Encoding

Binary Layout
EVEX
+0
59
+4
 
Format EVEX
Opcode 59
Extension AVX-512-FP16

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand