divsd

Divide Scalar Double-Precision

DIVSD xmm1, xmm2/m64

Divides the low double-precision floating-point value.

Details

The Divide Scalar Double-Precision instruction divides the low double-precision floating-point value.

Pseudocode Operation

// Divides the low double-precision floating-point value

Example

DIVSD xmm1, xmm2/m64

Encoding

Binary Layout
F2
+0
0F
+1
5E
+2
 
Format SSE2
Opcode F2 0F 5E
Extension SSE2

Operands

  • dest
    128-bit XMM SIMD register
  • src
    128-bit XMM SIMD register or Memory operand