insertq

Insert Field to Register

INSERTQ xmm1, xmm2

Inserts bit field into register (AMD SSE4a).

Details

Inserts a bit field from xmm2 into xmm1 at the position and length specified in xmm2 bits [13:8] and [5:0] respectively. The field from xmm2 is placed into xmm1 starting at the specified bit position; the rest of xmm1 remains unchanged. No EFLAGS are affected; this is an AMD SSE4a extension instruction.

Pseudocode Operation

field_length = xmm2[13:8]
field_pos = xmm2[5:0]
if (field_length == 0) then
  field_length = 64
end if
mask = ((1 << field_length) - 1)
insert_value = xmm2 & mask
xmm1 = (xmm1 & ~(mask << field_pos)) | (insert_value << field_pos)

Example

INSERTQ xmm1, xmm2

Encoding

Binary Layout

ModRM

Format SSE4a

Opcode F2 0F 79 /r

Extension SSE4a

Operands

dest
128-bit XMM SIMD register
src
128-bit XMM SIMD register

Reference (AMD APM)

Description

Inserts bits from the lower 64 bits of the source operand into the lower 64 bits of the destination operand. No other bits in the lower 64 bits of the destination are modified. The upper 64 bits of the destination are undefined. The least-significant l bits of the source operand are inserted into the destination, with the least-significant bit of the source operand inserted at bit position n, where l and n are defined as the field length and bit index, respectively. Bits (field length – 1):0 of the source operand are inserted into bits (bit index + field length – 1):(bit index) of the destination. If the sum of the bit index + length field is greater than 64, the results are undefined. For example, if the bit index is 32 (20h) and the field length is 16 (10h), then the result in the destination register will be source operand[15:0] in bits 47:32. Bits 63:48 and bits 31:0 are not modified. A value of zero in the field length is defined as a length of 64. If the length field is 0 and the bit index is 0, bits 63:0 of the source operand are inserted. For any other value of the bit index, the results are undefined. The bits to insert are located in the XMM2 source operand. The bit index and field length can be specified as immediate values or can be specified in the XMM source operand. In the immediate form, the bit index and the field length are specified by the fourth (second immediate byte) and third operands (first immediate byte), respectively. In the register form, the bit index and field length are specified in bits [77:72] and bits [69:64] of the source XMM register, respectively. The bit index and field length are each six bits in length; other bits in the field are ignored. The diagram below illustrates the operation of this instruction. first second XMM2 imm8 imm8 127 64 63 0 7 5 0 7 5 0 XMM1 127 64 63 0 select number of bits to insert select bit position for insert XMM1 XMM2 77 69 127 64 63 0 127 72 64 63 0 select number of bits to insert select bit position for insert 154 [AMDINSERTQPublic Use] Instruction Reference