shufpd

Shuffle Packed Double-Precision

SHUFPD xmm1, xmm2/m128, imm8

Shuffles 64-bit doubles between two XMM registers.

Details

The Shuffle Packed Double-Precision instruction shuffles 64-bit doubles between two XMM registers.

Pseudocode Operation

// Shuffles 64-bit doubles between two XMM registers

Example

SHUFPD xmm1, xmm2/m128, 3

Encoding

Binary Layout
66
+0
0F
+1
C6
+2
 
Format SSE2
Opcode 66 0F C6
Extension SSE2

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register or Memory operand
  • src2
    8-bit signed immediate