kandq

Bitwise Logical AND Masks Quadword

KANDQ k1, k2, k3

Bitwise AND of 64-bit mask registers.

Details

Performs a bitwise logical AND on two 64-bit mask registers (k2 and k3) and stores the result in the destination mask register (k1). All 64 bits of the mask registers are operated on. This is a low-latency operation with no flag modifications. Requires AVX-512BW for 64-bit mask register support.

Pseudocode Operation

k1 = k2 & k3

Example

KANDQ k1, k2, k3

Encoding

Binary Layout
EVEX
+0
0F
+4
41
+5
 
Format EVEX
Opcode VEX.L1.0F.W1 41 /r
Extension AVX-512BW

Operands

  • dest
    AVX-512 opmask register (k0-k7)
  • src1
    AVX-512 opmask register (k0-k7)
  • src2
    AVX-512 opmask register (k0-k7)

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.L1.0F.W0 41 /r KANDW k1, k2, k3 V/V RVR AVX512F OR AVX10.1 Bitwise AND 16 bits masks k2 and k3 and place result in k1.
VEX.L1.66.0F.W0 41 /r KANDB k1, k2, k3 V/V RVR AVX512DQ OR AVX10.1 Bitwise AND 8 bits masks k2 and k3 and place result in k1.
VEX.L1.0F.W1 41 /r KANDQ k1, k2, k3 V/V RVR AVX512BW OR AVX10.1 Bitwise AND 64 bits masks k2 and k3 and place result in k1.
VEX.L1.66.0F.W1 41 /r KANDD k1, k2, k3 V/V RVR AVX512BW OR AVX10.1 Bitwise AND 32 bits masks k2 and k3 and place result in k1.

Description

Performs a bitwise AND between the vector mask k2 and the vector mask k3, and writes the result into vector mask k1.

Operation

KANDW
DEST[15:0] := SRC1[15:0] BITWISE AND SRC2[15:0]
DEST[MAX_KL-1:16] := 0

KANDB
DEST[7:0] := SRC1[7:0] BITWISE AND SRC2[7:0]
DEST[MAX_KL-1:8] := 0


KANDQ
DEST[63:0] := SRC1[63:0] BITWISE AND SRC2[63:0]
DEST[MAX_KL-1:64] := 0

KANDD
DEST[31:0] := SRC1[31:0] BITWISE AND SRC2[31:0]
DEST[MAX_KL-1:32] := 0

Intel C/C++ Compiler Intrinsic Equivalent

KANDW __mmask16 _mm512_kand(__mmask16 a, __mmask16 b);

Flags Affected

None.

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-65, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).” KANDW/KANDB/KANDQ/KANDD—Bitwise Logical AND Masks Vol. 2A 3-516