vperm2i128

Permute 128-bit Integer Blocks

VPERM2I128 ymm1, ymm2, ymm3/m256, imm8

Shuffles two 128-bit lanes between registers.

Details

Permutes two 128-bit lanes from two 256-bit YMM registers based on an 8-bit immediate control value. The low nibble selects which 128-bit lane to take from src1, and the high nibble selects from src2; a lane can be zeroed by setting its selector to 0x8. The result fills the destination's two 128-bit halves independently. No arithmetic flags are affected.

Pseudocode Operation

ctrl_low = src3[3:0]
ctrl_high = src3[7:4]
if ctrl_low == 0x8:
  dest[127:0] ← 0
else:
  dest[127:0] ← src1[127:0] if (ctrl_low & 0x4) == 0 else src1[255:128]
if ctrl_high == 0x8:
  dest[255:128] ← 0
else:
  dest[255:128] ← src2[127:0] if (ctrl_high & 0x4) == 0 else src2[255:128]

Example

VPERM2I128 ymm1, ymm2, ymm3/m256, 3

Encoding

Binary Layout
VEX
+0
opcode
+3
ModRM
+4
 
Format VEX
Opcode VEX.256.66.0F3A.W0 46 /r ib
Extension AVX2

Operands

  • dest
    256-bit YMM AVX register
  • src1
    256-bit YMM AVX register
  • src2
    256-bit YMM AVX register or Memory operand
  • src3
    8-bit signed immediate

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.256.66.0F3A.W0 46 /r ib VPERM2I128 ymm1, ymm2, ymm3/m256, imm8 RVMI V/V AVX2 Permute 128-bit integer data in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.

Description

Permute 128 bit integer data from the first source operand (second operand) and second source operand (third operand) using bits in the 8-bit immediate and store results in the destination operand (first operand). The first source operand is a YMM register, the second source operand is a YMM register or a 256-bit memory location, and the destination operand is a YMM register. SRC2 Y1 Y0 SRC1 X1 X0 DEST X0, X1, Y0, or Y1 X0, X1, Y0, or Y1 Figure 5-22. VPERM2I128 Operation Imm8[1:0] select the source for the first destination 128-bit field, imm8[5:4] select the source for the second destination field. If imm8[3] is set, the low 128-bit field is zeroed. If imm8[7] is set, the high 128-bit field is zeroed. VEX.L must be 1, otherwise the instruction will #UD. VPERM2I128—Permute Integer Values Vol. 2C 5-496

Operation

VPERM2I128
CASE IMM8[1:0] of
0: DEST[127:0] := SRC1[127:0]
1: DEST[127:0] := SRC1[255:128]
2: DEST[127:0] := SRC2[127:0]
3: DEST[127:0] := SRC2[255:128]
ESAC
CASE IMM8[5:4] of
0: DEST[255:128] := SRC1[127:0]
1: DEST[255:128] := SRC1[255:128]
2: DEST[255:128] := SRC2[127:0]
3: DEST[255:128] := SRC2[255:128]
ESAC
IF (imm8[3])
DEST[127:0] := 0
FI

IF (imm8[7])
DEST[255:128] := 0
FI

Intel C/C++ Compiler Intrinsic Equivalent

VPERM2I128: __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, int control)

Exceptions

SIMD Floating-Point Exceptions

None

Other Exceptions

See Table 2-23, “Type 6 Class Exception Conditions.” Additionally: #UD If VEX.L = 0, If VEX.W = 1. VPERM2I128—Permute Integer Values Vol. 2C 5-497