vaesenc

Vector AES Encrypt (AVX512)

VAESENC zmm1, zmm2, zmm3/m512

AES Encrypt on 512-bit vector.

Details

The Vector AES Encrypt (AVX512) instruction aES Encrypt on 512-bit vector.

Pseudocode Operation

// AES Encrypt on 512-bit vector

Example

VAESENC zmm1, zmm2, zmm3/m512

Encoding

Binary Layout
EVEX
+0
DC
+4
 
Format EVEX
Opcode DC
Extension AVX-512-VAES

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand