pcmpistri

Packed Compare Implicit Length Strings, Return Index

PCMPISTRI xmm1, xmm2/m128, imm8

String search (null-terminated); returns index in ECX.

Details

Performs implicit-length (null-terminated) packed string comparison between two 128-bit operands using element size and comparison operation encoded in imm8, returning the index of the first match in ECX and setting CF and ZF flags. String lengths are determined by scanning for zero terminators; this is a SSE4.2 instruction that can serialize the pipeline and is available in 64-bit and protected modes.

Pseudocode Operation

pcmp_control ← imm8[2:0]
string_type ← imm8[5:4]
polarity ← imm8[7:6]
len1 ← scan_for_null(dest, string_type)
len2 ← scan_for_null(src, string_type)
intres ← perform_string_compare(dest, src, string_type, pcmp_control, len1, len2)
ECX ← intres
CF ← (intres < max_length)
ZF ← (intres == max_length)
SF ← OF ← undefined

Example

PCMPISTRI xmm1, xmm2/m128, 3

Encoding

Binary Layout
66
+0
0F
+1
3A
+2
63
+3
 
Format SSE4.2
Opcode 66 0F 3A 63
Extension SSE4.2

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register or Memory operand
  • src2
    8-bit signed immediate

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.128.66.0F3A.WIG 63 /r ib VPCMPISTRI xmm1, xmm2/m128, imm8 RM V/V AVX Perform a packed comparison of string data with implicit lengths, generating an index, and storing the result in ECX.

Description

The instruction compares data from two strings based on the encoded value in the imm8 control byte (see Section 4.1, “Imm8 Control Byte Operation for PCMPESTRI / PCMPESTRM / PCMPISTRI / PCMPISTRM”), and generates an index stored to ECX. Each string is represented by a single value. The value is an xmm (or possibly m128 for the second operand) which contains the data elements of the string (byte or word data). Each input byte/word is augmented with a valid/invalid tag. A byte/word is considered valid only if it has a lower index than the least significant null byte/word. (The least significant null byte/word is also considered invalid.) The comparison and aggregation operations are performed according to the encoded value of imm8 bit fields (see Section 4.1). The index of the first (or last, according to imm8[6]) set bit of IntRes2 is returned in ECX. If no bits are set in IntRes2, ECX is set to 16 (8). Note that the Arithmetic Flags are written in a non-standard manner in order to supply the most relevant information: CFlag – Reset if IntRes2 is equal to zero, set otherwise ZFlag – Set if any byte/word of xmm2/mem128 is null, reset otherwise SFlag – Set if any byte/word of xmm1 is null, reset otherwise OFlag –IntRes2[0] AFlag – Reset PFlag – Reset Note: In VEX.128 encoded version, VEX.vvvv is reserved and must be 1111b, VEX.L must be 0, otherwise the instruction will #UD. Effective Operand Size Operating mode/size Operand 1 Operand 2 Result 16 bit xmm xmm/m128 ECX 32 bit xmm xmm/m128 ECX 64 bit xmm xmm/m128 ECX Intel C/C++ Compiler Intrinsic Equivalent For Returning Index int _mm_cmpistri (__m128i a, __m128i b, const int mode); PCMPISTRI—Packed Compare Implicit Length Strings, Return Index Vol. 2B 4-267 Intel C/C++ Compiler Intrinsics For Reading EFlag Results int _mm_cmpistra (__m128i a, __m128i b, const int mode); int _mm_cmpistrc (__m128i a, __m128i b, const int mode); int _mm_cmpistro (__m128i a, __m128i b, const int mode); int _mm_cmpistrs (__m128i a, __m128i b, const int mode); int _mm_cmpistrz (__m128i a, __m128i b, const int mode);

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-21, “Type 4 Class Exception Conditions,” additionally, this instruction does not cause #GP if the memory operand is not aligned to 16 Byte boundary, and: #UD If VEX.L = 1. If VEX.vvvv ≠ 1111B. PCMPISTRI—Packed Compare Implicit Length Strings, Return Index Vol. 2B 4-268