vpshaw

Vector Packed Shift Arithmetic Word

VPSHAW xmm1, xmm2/m128, imm8

Shifts words arithmetically.

Details

The Vector Packed Shift Arithmetic Word instruction shifts words arithmetically.

Pseudocode Operation

// Shifts words arithmetically

Example

VPSHAW xmm1, xmm2/m128, 3

Encoding

Binary Layout
VEX
+0
opcode
+3
ModRM
+4
 
Format XOP
Opcode 8F ... 99
Extension XOP

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register or Memory operand
  • src2
    8-bit signed immediate