vdivsh

Divide Scalar Half-Precision

VDIVSH xmm1 {k1}, xmm2, xmm3/m16

Divides low FP16 value.

Details

The Divide Scalar Half-Precision instruction divides low FP16 value.

Pseudocode Operation

// Divides low FP16 value

Example

VDIVSH xmm1, xmm2, xmm3/m16

Encoding

Binary Layout
EVEX
+0
5E
+4
 
Format EVEX
Opcode 5E
Extension AVX-512-FP16

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register
  • src2
    128-bit XMM SIMD register or Memory operand