kortestq

OR Masks and Set Flags Quadword

KORTESTQ k1, k2

ORs 64-bit masks and sets EFLAGS (ZF/CF).

Details

ORs two 64-bit AVX-512 opmask registers and sets EFLAGS based on the result without storing the OR result. Sets ZF if the OR result is all zeros, and CF if the first source opmask is all zeros. Part of the AVX-512BW extension, this instruction is useful for testing mask conditions.

Pseudocode Operation

temp ← k1 | k2; ZF ← (temp == 0); CF ← (k1 == 0);

Example

KORTESTQ k1, k2

Encoding

Binary Layout
EVEX
+0
0F
+4
98
+5
 
Format EVEX
Opcode VEX.L0.0F.W1 98 /r
Extension AVX-512BW

Operands

  • dest
    AVX-512 opmask register (k0-k7)
  • src
    AVX-512 opmask register (k0-k7)

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.L0.0F.W0 98 /r KORTESTW k1, k2 V/V RR AVX512F OR AVX10.1 Bitwise OR 16 bits masks k1 and k2 and update ZF and CF accordingly.
VEX.L0.66.0F.W0 98 /r KORTESTB k1, k2 V/V RR AVX512DQ OR AVX10.1 Bitwise OR 8 bits masks k1 and k2 and update ZF and CF accordingly.
VEX.L0.0F.W1 98 /r KORTESTQ k1, k2 V/V RR AVX512BW OR AVX10.1 Bitwise OR 64 bits masks k1 and k2 and update ZF and CF accordingly.
VEX.L0.66.0F.W1 98 /r KORTESTD k1, k2 V/V RR AVX512BW OR AVX10.1 Bitwise OR 32 bits masks k1 and k2 and update ZF and CF accordingly.

Description

Performs a bitwise OR between the vector mask register k2, and the vector mask register k1, and sets CF and ZF based on the operation result. ZF flag is set if both sources are 0x0. CF is set if, after the OR operation is done, the operation result is all 1’s.

Operation

KORTESTW
TMP[15:0] := DEST[15:0] BITWISE OR SRC[15:0]
IF(TMP[15:0]=0)
THEN ZF := 1
ELSE ZF := 0
FI;
IF(TMP[15:0]=FFFFh)
THEN CF := 1
ELSE CF := 0
FI;

KORTESTB
TMP[7:0] := DEST[7:0] BITWISE OR SRC[7:0]
IF(TMP[7:0]=0)
THEN ZF := 1
ELSE ZF := 0
FI;
IF(TMP[7:0]==FFh)
THEN CF := 1
ELSE CF := 0
FI;





KORTESTW/KORTESTB/KORTESTQ/KORTESTD—OR Masks and Set Flags                                                                      Vol. 2A 3-520
KORTESTQ
TMP[63:0] := DEST[63:0] BITWISE OR SRC[63:0]
IF(TMP[63:0]=0)
THEN ZF := 1
ELSE ZF := 0
FI;
IF(TMP[63:0]==FFFFFFFF_FFFFFFFFh)
THEN CF := 1
ELSE CF := 0
FI;

KORTESTD
TMP[31:0] := DEST[31:0] BITWISE OR SRC[31:0]
IF(TMP[31:0]=0)
THEN ZF := 1
ELSE ZF := 0
FI;
IF(TMP[31:0]=FFFFFFFFh)
THEN CF := 1
ELSE CF := 0
FI;

Intel C/C++ Compiler Intrinsic Equivalent

KORTESTW __mmask16 _mm512_kortest[cz](__mmask16 a, __mmask16 b);

Flags Affected

The ZF flag is set if the result of OR-ing both sources is all 0s. The CF flag is set if the result of OR-ing both sources is all 1s. The OF, SF, AF, and PF flags are set to 0.

Exceptions

Other Exceptions

See Table 2-65, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).” KORTESTW/KORTESTB/KORTESTQ/KORTESTD—OR Masks and Set Flags Vol. 2A 3-521