fyl2xp1

Compute y * log2(x + 1)

FYL2XP1

Computes ST(1) * log2(ST(0) + 1).

Details

Computes ST(1) × log₂(ST(0) + 1) and stores the result in ST(1), then pops ST(0). ST(0) must be in the range (−1, 1) for full accuracy. This instruction is optimized for computing logarithms of numbers close to 1 and is used in transcendental function implementations to reduce rounding error.

Pseudocode Operation

if (ST(0) <= -1 or ST(0) >= 1) {
  undefined_behavior()
} else {
  result ← ST(1) * log2(ST(0) + 1)
  FPU_stack_pop()
  ST(0) ← result
}

Example

FYL2XP1

Encoding

Binary Layout

Format Legacy

Opcode D9 F9

Extension x87 FPU

Operands

Reference (Intel® SDM)

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
D9 F9	FYL2XP1		Valid Valid		Replace ST(1) with ST(1) ∗ log2(ST(0) + 1.0) and pop the register stack.

Description

Computes (ST(1) ∗ log2(ST(0) + 1.0)), stores the result in register ST(1), and pops the FPU register stack. The source operand in ST(0) must be in the range: – ( 1 – 2 ⁄ 2 ))to ( 1 – 2 ⁄ 2 ) The source operand in ST(1) can range from −∞ to +∞. If the ST(0) operand is outside of its acceptable range, the result is undefined and software should not rely on an exception being generated. Under some circumstances exceptions may be generated when ST(0) is out of range, but this behavior is implementation specific and not guaranteed. The following table shows the results obtained when taking the log epsilon of various classes of numbers, assuming that underflow does not occur. Table 3-51. FYL2XP1 Results ST(0) −(1 − ( 2 ⁄ 2 )) to −0 -0 +0 +0 to +(1 - ( 2 ⁄ 2 )) NaN − ∞ +∞ * * − ∞ NaN ST(1) − F +F +0 -0 − F NaN − 0 +0 +0 -0 − 0 NaN +0 − 0 − 0 +0 +0 NaN +F − F − 0 +0 +F NaN +∞ − ∞ * * +∞ NaN NaN NaN NaN NaN NaN NaN

Operation

ST(1) := ST(1) ∗ log2(ST(0) + 1.0);
PopRegisterStack;





FYL2XP1—Compute y * log2(x +1)                                                                                                               Vol. 2A 3-424

Exceptions

Protected Mode Exceptions

#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #MF If there is a pending x87 FPU exception. #UD If the LOCK prefix is used.

Real-Address Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Same exceptions as in protected mode.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

Same exceptions as in protected mode. FYL2XP1—Compute y * log2(x +1) Vol. 2A 3-425