vmclear
Clear Virtual-Machine Control Structure
Initializes a VMCS region in memory.
Pseudocode Operation
if (CPL != 0 || VMX_ROOT == 0) raise #UD
VMCS_PTR ← [m64]
if (!validate_vmcs_region(VMCS_PTR)) { RFLAGS.CF ← 1; RFLAGS.ZF ← 0; } else { clear_vmcs(VMCS_PTR); RFLAGS.CF ← 0; RFLAGS.ZF ← 0; }
Example
Encoding
Operands
-
dest
64-bit memory operand (quadword)
Related
More in VMX
Reference
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| 66 0F C7 /6 | VMCLEAR m64 | M | Copy VMCS data to VMCS region in memory. |
Description
This instruction applies to the VMCS whose VMCS region resides at the physical address contained in the instruction operand. The instruction ensures that VMCS data for that VMCS (some of these data may be currently maintained on the processor) are copied to the VMCS region in memory. It also initializes parts of the VMCS region (for example, it sets the launch state of that VMCS to clear). See Chapter 27, “Virtual Machine Control Structures.” The operand of this instruction is always 64 bits and is always in memory. If the operand is the current-VMCS pointer, then that pointer is made invalid (set to FFFFFFFF_FFFFFFFFH). Note that the VMCLEAR instruction might not explicitly write any VMCS data to memory; the data may be already resident in memory before the VMCLEAR is executed.
Operation
IF (register operand) or (not in VMX operation) or (CR0.PE = 0) or (RFLAGS.VM = 1) or (IA32_EFER.LMA = 1 and CS.L = 0) THEN #UD; ELSIF in VMX non-root operation THEN VM exit; ELSIF CPL > 0 THEN #GP(0); ELSE addr := contents of 64-bit in-memory operand; IF addr is not 4KB-aligned OR addr sets any bits beyond the processor’s physical-address width1,2 THEN VMfail(VMCLEAR with invalid physical address); ELSIF addr = VMXON pointer THEN VMfail(VMCLEAR with VMXON pointer); ELSE ensure that data for VMCS referenced by the operand is in memory; initialize implementation-specific data in VMCS region; launch state of VMCS referenced by the operand := “clear” IF operand addr = current-VMCS pointer THEN current-VMCS pointer := FFFFFFFF_FFFFFFFFH; FI; VMsucceed; 1. If IA32_VMX_BASIC[48] is read as 1, VMfail occurs if addr sets any bits in the range 63:32; see Appendix A.1. 2. Usually, the processor’s physical-address width is the value enumerated in CPUID.80000008H:EAX[7:0] (at most 52). If IA32_TME_ACTIVATE[0] = 1 (indicating that TME has been configured), the width is reduced by the value of IA32_TME_ACTI- VATE[39:36] when a logical processor is outside secure arbitration mode (SEAM; see Chapter 35); the value is not reduced in SEAM. IA32_TME_ACTIVATE[39:36] is the number of physical-address bits reserved to encode TDX-private key identifiers. This number is never greater than IA32_TME_ACTIVATE[35:32], which is the number physical-address bits used for key identifiers generally. VMCLEAR-Clear Virtual-Machine Control Structure 33-11 Vol. 3C FI; FI;