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x86 Opcode Map

Reverse lookup instructions by their hexadecimal encoding.

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Opcode Mnemonic Syntax Format Name
37 aaa AAA Legacy ASCII Adjust After Addition
D5 aad AAD imm8 Legacy ASCII Adjust Before Division
66 0F 38 FC aadd AADD m32, r32 VEX Atomically Add
D4 aam AAM imm8 Legacy ASCII Adjust After Multiply
66 0F 38 FC /r aand AAND m32, r32 VEX Atomically AND
3F aas AAS Legacy ASCII Adjust After Subtraction
11 adc ADC r/m, r Legacy Add with Carry
66 0F 38 F6 adcx ADCX r32, r/m32 Legacy Unsigned Integer Addition of Two Operands with Carry Flag
00-05 add ADD r/m, r Legacy Add
01 add ADD r/m, r Legacy Add
66 0F 58 addpd ADDPD xmm, xmm/m128 SSE2 Add Packed Double-Precision
0F 58 addps ADDPS xmm, xmm/m128 SSE Add Packed Single-Precision
F2 0F 58 addsd ADDSD xmm, xmm/m64 SSE2 Add Scalar Double-Precision
F2 0F 58 addsd ADDSD xmm1, xmm2/m64 SSE2 Add Scalar Double-Precision
F3 0F 58 addss ADDSS xmm, xmm/m32 SSE Add Scalar Single-Precision
F3 0F 58 addss ADDSS xmm1, xmm2/m32 SSE Add Scalar Single-Precision
66 0F D0 addsubpd ADDSUBPD xmm1, xmm2/m128 SSE3 Packed Double-FP Add/Subtract
F2 0F D0 addsubps ADDSUBPS xmm1, xmm2/m128 SSE3 Packed Single-FP Add/Subtract
F3 0F 38 F6 adox ADOX r32, r/m32 Legacy Unsigned Integer Addition of Two Operands with Overflow Flag
66 0F 38 DE aesdec AESDEC xmm1, xmm2/m128 AES-NI AES Decrypt
F3 0F 38 DE aesdec128kl AESDEC128KL m128, xmm Legacy AES Decrypt 128-bit Key Locker
F3 0F 38 DD aesdec256kl AESDEC256KL m128, xmm Legacy AES Decrypt 256-bit Key Locker
F3 0F 38 D8 aesdecwide128kl AESDECWIDE128KL m128 Legacy AES Decrypt Wide 128-bit Key Locker
F3 0F 38 D8 aesdecwide256kl AESDECWIDE256KL m128 Legacy AES Decrypt Wide 256-bit Key Locker
66 0F 38 DC aesenc AESENC xmm1, xmm2/m128 AES-NI AES Encrypt
F3 0F 38 DD aesenc128kl AESENC128KL m128, xmm Legacy AES Encrypt 128-bit Key Locker
F3 0F 38 DC aesenc256kl AESENC256KL m128, xmm Legacy AES Encrypt 256-bit Key Locker
66 0F 38 DD aesenclast AESENCLAST xmm1, xmm2/m128 AES-NI AES Encrypt Last Round
F3 0F 38 D8 aesencwide128kl AESENCWIDE128KL m128 Legacy AES Encrypt Wide 128-bit Key Locker
F3 0F 38 D8 /1 aesencwide256kl AESENCWIDE256KL m128 Legacy AES Encrypt Wide 256-bit Key Locker
F3 0F 38 D8 aesencwide256kl AESENCWIDE256KL m128 Legacy AES Encrypt Wide 256-bit Key Locker
66 0F 38 DB aesimc AESIMC xmm1, xmm2/m128 AES-NI AES Inverse Mix Columns
66 0F 3A DF aeskeygenassist AESKEYGENASSIST xmm1, xmm2/m128, imm8 AES-NI AES Key Generation Assist
20-25 and AND r/m, r Legacy Logical AND
21 and AND r/m, r Legacy Logical AND
C4 ... F2 andn ANDN r32, r32, r/m32 VEX Logical AND NOT
66 0F 54 andpd ANDPD xmm, xmm/m128 SSE2 Bitwise Logical AND Packed Double-Precision
0F 54 andps ANDPS xmm, xmm/m128 SSE Bitwise Logical AND Packed Single-Precision
66 0F 38 FC /r aor AOR m32, r32 VEX Atomically OR
63 arpl ARPL r/m16, r16 System Adjust Requested Privilege Level
66 0F 38 FC /r axor AXOR m32, r32 VEX Atomically XOR
C4 ... F7 bextr BEXTR r32, r/m32, r32 VEX Bit Field Extract
8F ... 01 blcfill BLCFILL r32, r/m32 TBM Fill From Lowest Clear Bit
8F ... 02 blci BLCI r32, r/m32 TBM Bit Line Create Isolated
8F ... 05 blcic BLCIC r32, r/m32 TBM Bit Line Create Isolated and Complement
8F ... 01 blcmsk BLCMSK r32, r/m32 TBM Bit Line Create Mask
8F ... 03 blcs BLCS r32, r/m32 TBM Bit Line Create Set
66 0F 3A 0D blendpd BLENDPD xmm1, xmm2/m128, imm8 SSE4.1 Blend Packed Double-Precision
66 0F 3A 0C blendps BLENDPS xmm1, xmm2/m128, imm8 SSE4.1 Blend Packed Single-Precision
66 0F 38 15 blendvpd BLENDVPD xmm1, xmm2/m128, <XMM0> SSE4.1 Variable Blend Packed Double
66 0F 38 14 blendvps BLENDVPS xmm1, xmm2/m128, <XMM0> SSE4.1 Variable Blend Packed Single
8F ... 04 blsfill BLSFILL r32, r/m32 TBM Bit Line Set Fill
C4 ... F3 /3 blsi BLSI r32, r/m32 VEX Extract Lowest Set Isolated Bit
8F ... 06 blsic BLSIC r32, r/m32 TBM Bit Line Set Isolated and Complement
C4 ... F3 /2 blsmsk BLSMSK r32, r/m32 VEX Get Mask Up to Lowest Set Bit
C4 ... F3 /1 blsr BLSR r32, r/m32 VEX Reset Lowest Set Bit
F3 0F 1A bndcl BNDCL b, r/m Legacy Check Lower Bound
F2 0F 1A bndcu BNDCU b, r/m Legacy Check Upper Bound
F3 0F 1B bndmk BNDMK b, m Legacy Make Bounds
66 0F 1A bndmov BNDMOV b, b/m Legacy Move Bounds
62 bound BOUND r, m Legacy Check Array Index Against Bounds
0F BC bsf BSF r, r/m Legacy Bit Scan Forward
0F BD bsr BSR r, r/m Legacy Bit Scan Reverse
0F C8+rd bswap BSWAP r32 Legacy Byte Swap
0F C8 bswap BSWAP r Legacy Byte Swap
0F A3 bt BT r/m, r Legacy Bit Test
0F BB btc BTC r/m, r Legacy Bit Test and Complement
0F B3 btr BTR r/m, r Legacy Bit Test and Reset
0F AB bts BTS r/m, r Legacy Bit Test and Set
C4 ... F5 bzhi BZHI r32, r/m32, r32 VEX Zero High Bits Starting with Specified Bit Position
E8 call CALL rel Legacy Call Procedure
98 cbw CBW Legacy Convert Byte to Word
0F 01 CA clac CLAC Legacy Clear AC Flag in EFLAGS
F8 clc CLC Legacy Clear Carry Flag
FC cld CLD Legacy Clear Direction Flag
0F 1C /0 cldemote CLDEMOTE m8 Legacy Cache Line Demote
0F AE /7 clflush CLFLUSH m8 SSE2 Cache Line Flush
66 0F AE /7 clflushopt CLFLUSHOPT m8 Legacy Optimized Cache Line Flush
0F 01 DD clgi CLGI SVM Clear Global Interrupt Flag
FA cli CLI Legacy Clear Interrupt Flag
F3 0F AE /6 clrssbsy CLRSSBSY m64 Legacy Clear Shadow Stack Busy Flag
99 cltd CLTD Legacy Convert Long to Double Long
0F 06 clts CLTS System Clear Task-Switched Flag
F3 0F 01 EE clui CLUI Legacy Clear User Interrupt Flag
66 0F AE /6 clwb CLWB m8 Legacy Cache Line Write Back
0F 01 FC clzero CLZERO AMD Zero Cache Line
F5 cmc CMC Legacy Complement Carry Flag
0F 4x cmovcc CMOVcc r, r/m Legacy Conditional Move
0F 4F cmovg CMOVG r, r/m Legacy Conditional Move Greater
0F 4D cmovge CMOVGE r, r/m Legacy Conditional Move Greater or Equal
0F 4C cmovl CMOVL r, r/m Legacy Conditional Move Less
0F 4E cmovle CMOVLE r, r/m Legacy Conditional Move Less or Equal
0F 45 cmovnz CMOVNZ r, r/m Legacy Conditional Move Not Zero
0F 44 cmovz CMOVZ r, r/m Legacy Conditional Move Zero
38-3D cmp CMP r/m, r Legacy Compare Two Operands
39 cmp CMP r/m, r Legacy Compare Two Operands
66 0F 38 E0 cmpccxadd CMPccXADD m32, r32, r32 EVEX Compare and Add if Condition is Met
A6 cmps CMPSB Legacy Compare String
F2 0F C2 cmpsd CMPSD xmm1, xmm2/m64, imm8 SSE2 Compare Scalar Double-Precision
A7 cmpsd CMPSD Legacy Compare String Doubleword
48 A7 cmpsq CMPSQ Legacy Compare String Quadword
F3 0F C2 cmpss CMPSS xmm1, xmm2/m32, imm8 SSE Compare Scalar Single-Precision
66 A7 cmpsw CMPSW Legacy Compare String Word
0F B1 cmpxchg CMPXCHG r/m, r Legacy Compare and Exchange
0F C7 /1 cmpxchg16b CMPXCHG16B m128 Base (64-bit) Compare and Exchange 16 Bytes
0F C7 /1 cmpxchg8b CMPXCHG8B m64 Legacy Compare and Exchange 8 Bytes
66 0F 2F comisd COMISD xmm1, xmm2/m64 SSE2 Compare Scalar Ordered Double-Precision
0F 2F comiss COMISS xmm1, xmm2/m32 SSE Compare Scalar Ordered Single-Precision
0F A2 cpuid CPUID Legacy CPU Identification
48 99 cqto CQTO Legacy Convert Quadword to Octoword
F2 0F 38 F1 crc32 CRC32 r32, r/m SSE4.2 Accumulate CRC32 Value
F3 0F E6 cvtdq2pd CVTDQ2PD xmm1, xmm2/m64 SSE2 Convert Packed Doubleword to Packed Double-Precision
0F 5B cvtdq2ps CVTDQ2PS xmm1, xmm2/m128 SSE2 Convert Packed Doubleword Integers to Packed Single-Precision
F2 0F E6 cvtpd2dq CVTPD2DQ xmm1, xmm2/m128 SSE2 Convert Packed Double-Precision to Packed Doubleword
66 0F 5A cvtpd2ps CVTPD2PS xmm1, xmm2/m128 SSE2 Convert Packed Double to Packed Single
66 0F 5B cvtps2dq CVTPS2DQ xmm1, xmm2/m128 SSE2 Convert Packed Single-Precision to Packed Doubleword Integers
0F 5A cvtps2pd CVTPS2PD xmm1, xmm2/m64 SSE2 Convert Packed Single to Packed Double
F2 0F 2D cvtsd2si CVTSD2SI r32, xmm/m64 SSE2 Convert Scalar Double to Integer
F2 0F 2D cvtsd2sq CVTSD2SQ r64, xmm/m64 SSE2 Convert Scalar Double-Precision to Signed Quadword Integer
F2 0F 5A cvtsd2ss CVTSD2SS xmm, xmm/m64 SSE2 Convert Scalar Double to Scalar Single
F2 0F 2A cvtsi2sd CVTSI2SD xmm, r/m32 SSE2 Convert Doubleword Integer to Scalar Double-Precision
F3 0F 2A cvtsi2ss CVTSI2SS xmm, r/m32 SSE Convert Doubleword Integer to Scalar Single-Precision
F2 0F 2A cvtsq2sd CVTSQ2SD xmm1, r/m64 SSE2 Convert Signed Quadword Integer to Scalar Double-Precision
F3 0F 2A cvtsq2ss CVTSQ2SS xmm1, r/m64 SSE Convert Signed Quadword Integer to Scalar Single-Precision
F3 0F 5A cvtss2sd CVTSS2SD xmm, xmm/m32 SSE2 Convert Scalar Single to Scalar Double
F3 0F 2D cvtss2si CVTSS2SI r32, xmm/m32 SSE Convert Scalar Single to Integer
F3 0F 2D cvtss2sq CVTSS2SQ r64, xmm/m32 SSE Convert Scalar Single-Precision to Signed Quadword Integer
66 0F E6 cvttpd2dq CVTTPD2DQ xmm1, xmm2/m128 SSE2 Convert with Truncation Packed Double to Packed Doubleword
F3 0F 5B cvttps2dq CVTTPS2DQ xmm1, xmm2/m128 SSE2 Convert with Truncation Packed Single-Precision to Packed Doubleword Integers
0F 2C cvttps2pi CVTTPS2PI mm, xmm/m64 SSE Convert with Truncation Packed Single to Packed Integer (MMX)
F2 0F 2C cvttsd2si CVTTSD2SI r32, xmm/m64 SSE2 Convert with Truncation Scalar Double to Integer
F2 0F 2C cvttsd2sq CVTTSD2SQ r64, xmm/m64 SSE2 Convert with Truncation Scalar Double-Precision to Signed Quadword Integer
F3 0F 2C cvttss2si CVTTSS2SI r32, xmm/m32 SSE Convert with Truncation Scalar Single to Integer
F3 0F 2C cvttss2sq CVTTSS2SQ r64, xmm/m32 SSE Convert with Truncation Scalar Single-Precision to Signed Quadword Integer
99 cwd CWD Legacy Convert Word to Doubleword
98 cwtl CWTL Legacy Convert Word to Long
27 daa DAA Legacy Decimal Adjust After Addition
2F das DAS Legacy Decimal Adjust After Subtraction
FF /1 dec DEC r/m Legacy Decrement
F7 /6 div DIV r/m Legacy Unsigned Divide
66 0F 5E divpd DIVPD xmm, xmm/m128 SSE2 Divide Packed Double-Precision
0F 5E divps DIVPS xmm, xmm/m128 SSE Divide Packed Single-Precision
F2 0F 5E divsd DIVSD xmm1, xmm2/m64 SSE2 Divide Scalar Double-Precision
F3 0F 5E divss DIVSS xmm1, xmm2/m32 SSE Divide Scalar Single-Precision
66 0F 3A 41 dppd DPPD xmm1, xmm2/m128, imm8 SSE4.1 Dot Product Packed Double-Precision
66 0F 3A 40 dpps DPPS xmm1, xmm2/m128, imm8 SSE4.1 Dot Product Packed Single-Precision
0F 77 emms EMMS MMX Empty MMX Technology State
0F 01 CF encls ENCLS Legacy Execute Enclave Supervisor Leaf
0F 01 D7 enclu ENCLU Legacy Execute Enclave User Leaf
F3 0F 38 FA encodekey128 ENCODEKEY128 r32, r32 Legacy Encode 128-bit Key
F3 0F 38 FB encodekey256 ENCODEKEY256 r32, r32 Legacy Encode 256-bit Key
F3 0F 1E FB endbr32 ENDBR32 Legacy End Branch 32-bit
F3 0F 1E FA endbr64 ENDBR64 Legacy End Branch 64-bit
F2 0F 38 F8 enqcmd ENQCMD r32, m512 Legacy Enqueue Command
F3 0F 38 F8 enqcmds ENQCMDS r32, m512 Legacy Enqueue Command Supervisor
C8 enter ENTER imm16, imm8 Legacy Make Stack Frame
F2 0F 01 CA erets ERETS Legacy Event Return Supervisor
F3 0F 01 CA eretu ERETU Legacy Event Return User
66 0F 3A 17 extractps EXTRACTPS r32/m32, xmm1, imm8 SSE4.1 Extract Packed Single-Precision
66 0F 79 /0 extrq EXTRQ xmm1, xmm2 SSE4a Extract Field from Register
D9 F0 f2xm1 F2XM1 Legacy Compute 2^x - 1
D9 E1 fabs FABS Legacy Absolute Value
D8 /0 fadd FADD m32fp/m64fp Legacy Add Floating Point
D9 E0 fchs FCHS Legacy Change Sign
9B DB E2 fclex FCLEX Legacy Clear Exceptions
DA C0+i fcmovb FCMOVB ST(0), ST(i) Legacy Floating-Point Conditional Move If Below
DA D0+i fcmovbe FCMOVBE ST(0), ST(i) Legacy Floating-Point Conditional Move If Below or Equal
DA C8+i fcmove FCMOVE ST(0), ST(i) Legacy Floating-Point Conditional Move If Equal
DB C0+i fcmovnb FCMOVNB ST(0), ST(i) Legacy Floating-Point Conditional Move If Not Below
DB D0+i fcmovnbe FCMOVNBE ST(0), ST(i) Legacy Floating-Point Conditional Move If Not Below or Equal
DB C8+i fcmovne FCMOVNE ST(0), ST(i) Legacy Floating-Point Conditional Move If Not Equal
DB D8+i fcmovnu FCMOVNU ST(0), ST(i) Legacy Floating-Point Conditional Move If Not Unordered
DA D8+i fcmovu FCMOVU ST(0), ST(i) Legacy Floating-Point Conditional Move If Unordered
D8 /2 fcom FCOM m32fp/m64fp Legacy Compare Real
DB F0+i fcomi FCOMI ST(0), ST(i) Legacy Compare Real and Set EFLAGS
D9 FF fcos FCOS Legacy Cosine
D9 F6 fdecstp FDECSTP Legacy Decrement Stack-Top Pointer
D8 /6 fdiv FDIV m32fp/m64fp Legacy Divide Floating Point
DD C0+i ffree FFREE ST(i) Legacy Free Floating-Point Register
DF /0 fild FILD m16int/m32int/m64int Legacy Load Integer
D9 F7 fincstp FINCSTP Legacy Increment Stack-Top Pointer
9B DB E3 finit FINIT Legacy Initialize FPU
DF /2 fist FIST m16int/m32int Legacy Store Integer
DF /3 fistp FISTP m16int/m32int/m64int Legacy Store Integer and Pop
D9 /0 fld FLD m32fp/m64fp/m80fp Legacy Load Floating Point Value
D9 E8 fld1 FLD1 Legacy Load Constant 1.0
D9 /5 fldcw FLDCW m2byte Legacy Load Control Word
D9 EA fldl2e FLDL2E Legacy Load Constant log2(e)
D9 E9 fldl2t FLDL2T Legacy Load Constant log2(10)
D9 EC fldlg2 FLDLG2 Legacy Load Constant log10(2)
D9 ED fldln2 FLDLN2 Legacy Load Constant ln(2)
D9 EB fldpi FLDPI Legacy Load Constant Pi
D9 EE fldz FLDZ Legacy Load Constant +0.0
D8 /1 fmul FMUL m32fp/m64fp Legacy Multiply Floating Point
D9 F3 fpatan FPATAN Legacy Partial Arctangent
D9 F8 fprem FPREM Legacy Partial Remainder
D9 F2 fptan FPTAN Legacy Partial Tangent
D9 FC frndint FRNDINT Legacy Round to Integer
DD /4 frstor FRSTOR m108byte Legacy Restore FPU State
9B DD /6 fsave FSAVE m108byte Legacy Save FPU State
D9 FD fscale FSCALE Legacy Scale
D9 FE fsin FSIN Legacy Sine
D9 FB fsincos FSINCOS Legacy Sine and Cosine
D9 FA fsqrt FSQRT Legacy Square Root
D9 /2 fst FST m32fp/m64fp Legacy Store Floating Point Value
9B D9 /7 fstcw FSTCW m2byte Legacy Store Control Word
D9 /3 fstp FSTP m32fp/m64fp/m80fp Legacy Store Floating Point Value and Pop
9B DF E0 fstsw FSTSW AX Legacy Store Status Word
D8 /4 fsub FSUB m32fp/m64fp Legacy Subtract Floating Point
DD E0+i fucom FUCOM ST(i) Legacy Unordered Compare Real
D9 C8+i fxch FXCH ST(i) Legacy Exchange Register
D9 F4 fxtract FXTRACT Legacy Extract Exponent and Significand
D9 F1 fyl2x FYL2X Legacy Y * log2(X)
D9 F9 fyl2xp1 FYL2XP1 Legacy Compute y * log2(x + 1)
0F 37 getsec GETSEC Legacy Get Security Extensions
66 0F 3A CF gf2p8affineinvqb GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8 VEX Galois Field Affine Transformation Inverse
66 0F 3A CE gf2p8affineqb GF2P8AFFINEQB xmm1, xmm2/m128, imm8 VEX Galois Field Affine Transformation
66 0F 38 CF gf2p8mulb GF2P8MULB xmm1, xmm2/m128 VEX Galois Field Multiply Bytes
66 0F 7C haddpd HADDPD xmm1, xmm2/m128 SSE3 Horizontal Add Packed Double-Precision
F2 0F 7C haddps HADDPS xmm1, xmm2/m128 SSE3 Horizontal Add Packed Single-Precision
F4 hlt HLT Legacy Halt
F3 0F 3A F0 hreset HRESET imm8 Legacy History Reset
66 0F 7D hsubpd HSUBPD xmm1, xmm2/m128 SSE3 Horizontal Subtract Packed Double-Precision
F2 0F 7D hsubps HSUBPS xmm1, xmm2/m128 SSE3 Horizontal Subtract Packed Single-Precision
F7 /7 idiv IDIV r/m Legacy Signed Divide
0F AF imul IMUL r, r/m Legacy Signed Multiply
E4 in IN AL, imm8 Legacy Input from Port
EC/ED in_var IN AL/AX/EAX, DX Legacy Input from Port (Variable)
FF /0 inc INC r/m Legacy Increment
F3 0F AE /5 incsspq INCSSPQ r64 Legacy Increment Shadow Stack Pointer (Quadword)
6C ins INSB Legacy Input String from Port
6D insd INSD Legacy Input String Doubleword from Port
66 0F 3A 21 insertps INSERTPS xmm1, xmm2/m32, imm8 SSE4.1 Insert Packed Single-Precision
66 0F 79 /4 insertq INSERTQ xmm1, xmm2 SSE4a Insert Field to Register
66 6D insw INSW Legacy Input String Word from Port
CD int INT imm8 Legacy Interrupt
F1 int1 INT1 Legacy ICE Breakpoint
CC int3 INT3 Legacy Breakpoint
0F 08 invd INVD System Invalidate Internal Caches
66 0F 38 80 invept INVEPT r64, m128 VMX Invalidate Translations Derived from EPT
0F 01 /7 invlpg INVLPG m System Invalidate TLB Entry
0F 01 DF invlpga INVLPGA SVM Invalidate TLB Entry in ASID
66 0F 38 82 invpcid INVPCID r32, m128 Legacy Invalidate Process-Context Identifier
66 0F 38 81 invvpid INVVPID r64, m128 VMX Invalidate Translations Based on VPID
CF iret IRET Legacy Interrupt Return
CF iretd IRETD Legacy Interrupt Return Doubleword
CF iretq IRETQ Legacy Interrupt Return Quadword
77 ja JA rel Legacy Jump if Above
72 jb JB rel Legacy Jump if Below
74 je JE rel Legacy Jump if Equal
E3 jecxz JECXZ rel Legacy Jump if ECX is Zero
7F jg JG rel Legacy Jump if Greater
7C jl JL rel Legacy Jump if Less
EB / E9 jmp JMP rel Legacy Jump
E9 jmp JMP rel Legacy Jump
75 jne JNE rel Legacy Jump if Not Equal
71 jno JNO rel Legacy Jump if Not Overflow
7B jnp JNP rel Legacy Jump if Not Parity
79 jns JNS rel Legacy Jump if Not Sign
70 jo JO rel Legacy Jump if Overflow
7A jp JP rel Legacy Jump if Parity
78 js JS rel Legacy Jump if Sign
0F 4A kaddb KADDB k1, k2, k3 EVEX Add Masks Byte
0F 4A kaddw KADDW k1, k2, k3 EVEX Add Masks Word
0F 42 kandnw KANDNW k1, k2, k3 EVEX Bitwise Logical AND NOT Masks Word
0F 41 kandq KANDQ k1, k2, k3 EVEX Bitwise Logical AND Masks Quadword
0F 41 kandw KANDW k1, k2, k3 EVEX Bitwise Logical AND Masks Word
0F 90 kmovq KMOVQ k1, k2/m64 EVEX Move Quadword Mask Register
0F 90 kmovw KMOVW k1, k2/m16 EVEX Move Word Mask Register
0F 44 knotb KNOTB k1, k2 EVEX NOT Mask Byte
0F 44 knotd KNOTD k1, k2 EVEX NOT Mask Doubleword
0F 44 knotq KNOTQ k1, k2 EVEX Bitwise Logical NOT Masks Quadword
0F 44 knotw KNOTW k1, k2 EVEX Bitwise Logical NOT Masks Word
0F 45 korb KORB k1, k2, k3 EVEX OR Mask Byte
0F 45 kord KORD k1, k2, k3 EVEX OR Mask Doubleword
0F 45 korq KORQ k1, k2, k3 EVEX Bitwise Logical OR Masks Quadword
0F 98 kortestb KORTESTB k1, k2 EVEX OR Masks and Set Flags Byte
0F 98 kortestq KORTESTQ k1, k2 EVEX OR Masks and Set Flags Quadword
0F 98 kortestw KORTESTW k1, k2 EVEX OR Masks And Set Flags Word
0F 45 korw KORW k1, k2, k3 EVEX Bitwise Logical OR Masks Word
66 0F 3A 31 kshiftlb KSHIFTLB k1, k2, imm8 EVEX Shift Left Mask Byte
66 0F 3A 35 kshiftld KSHIFTLD k1, k2, imm8 EVEX Shift Left Mask Doubleword
66 0F 3A 37 kshiftlq KSHIFTLQ k1, k2, imm8 EVEX Shift Left Mask Quadword
66 0F 3A 33 kshiftlw KSHIFTLW k1, k2, imm8 EVEX Shift Left Mask Word
66 0F 3A 30 kshiftrb KSHIFTRB k1, k2, imm8 EVEX Shift Right Mask Byte
66 0F 3A 34 kshiftrd KSHIFTRD k1, k2, imm8 EVEX Shift Right Mask Doubleword
66 0F 3A 36 kshiftrq KSHIFTRQ k1, k2, imm8 EVEX Shift Right Mask Quadword
66 0F 3A 32 kshiftrw KSHIFTRW k1, k2, imm8 EVEX Shift Right Mask Word
0F 99 ktestb KTESTB k1, k2 EVEX Test Masks Byte
0F 99 ktestd KTESTD k1, k2 EVEX Test Masks Doubleword
0F 99 ktestq KTESTQ k1, k2 EVEX Test Masks Quadword
0F 99 ktestw KTESTW k1, k2 EVEX Test Masks Word
0F 4B kunpckbw KUNPCKBW k1, k2, k3 EVEX Unpack and Interleave Masks Byte to Word
0F 4B kunpckdq KUNPCKDQ k1, k2, k3 EVEX Unpack and Interleave Masks Doubleword to Quadword
0F 4B kunpckwd KUNPCKWD k1, k2, k3 EVEX Unpack and Interleave Masks Word to Doubleword
0F 47 kxorb KXORB k1, k2, k3 EVEX XOR Mask Byte
0F 47 kxord KXORD k1, k2, k3 EVEX XOR Mask Doubleword
0F 47 kxorq KXORQ k1, k2, k3 EVEX XOR Mask Quadword
0F 47 kxorw KXORW k1, k2, k3 EVEX Bitwise Logical XOR Masks Word
9F lahf LAHF Legacy Load Flags into AH
0F 02 lar LAR r, r/m16 System Load Access Rights Byte
F2 0F F0 lddqu LDDQU xmm1, m128 SSE3 Load Unaligned Integer 128-bit
0F AE /2 ldmxcsr LDMXCSR m32 SSE Load MXCSR Register
C5 lds LDS r, m Legacy Load Far Pointer using DS
C4 ... 49 ldtilecfg LDTILECFG m512 VEX Load Tile Configuration
8D lea LEA r, m Legacy Load Effective Address
C9 leave LEAVE Legacy High Level Procedure Exit
C4 les LES r, m Legacy Load Far Pointer using ES
0F AE E8 lfence LFENCE SSE2 Load Fence
0F B4 lfs LFS r, m Legacy Load Far Pointer using FS
0F 01 /2 lgdt LGDT m16&32 System Load Global Descriptor Table Register
0F B5 lgs LGS r, m Legacy Load Far Pointer using GS
0F 01 /3 lidt LIDT m16&32 System Load Interrupt Descriptor Table Register
F2 0F 00 /6 lkgs LKGS r16 Legacy Load Kernel GS Base
0F 00 /2 lldt LLDT r/m16 System Load Local Descriptor Table Register
0F 01 /6 lmsw LMSW r/m16 System Load Machine Status Word
F3 0F 38 DC loadiwkey LOADIWKEY xmm1, xmm2 Legacy Load Internal Wrapping Key
AC lods LODSB Legacy Load String
AC lodsd LODSD Legacy Load String Doubleword
48 AC lodsq LODSQ Legacy Load String Quadword
66 AC lodsw LODSW Legacy Load String Word
E2 loop LOOP rel Legacy Loop
E1 loope LOOPE rel Legacy Loop if Equal
E0 loopne LOOPNE rel Legacy Loop if Not Equal
0F 03 lsl LSL r, r/m16 System Load Segment Limit
0F B2 lss LSS r, m Legacy Load Far Pointer using SS
0F 00 /3 ltr LTR r/m16 System Load Task Register
F3 0F BD lzcnt LZCNT r, r/m VEX Count Leading Zeros
66 0F F7 maskmovdqu MASKMOVDQU xmm, xmm SSE2 Store Selected Bytes of Double Quadword
0F F7 maskmovq MASKMOVQ mm1, mm2 MMX Store Selected Bytes of Quadword
0F 5F maxps MAXPS xmm, xmm/m128 SSE Maximum Packed Single-Precision
F2 0F 5F maxsd MAXSD xmm1, xmm2/m64 SSE2 Maximum Scalar Double-Precision
F3 0F 5F maxss MAXSS xmm1, xmm2/m32 SSE Maximum Scalar Single-Precision
0F AE F0 mfence MFENCE SSE2 Memory Fence
0F 5D minps MINPS xmm, xmm/m128 SSE Minimum Packed Single-Precision
F2 0F 5D minsd MINSD xmm1, xmm2/m64 SSE2 Minimum Scalar Double-Precision
F3 0F 5D minss MINSS xmm1, xmm2/m32 SSE Minimum Scalar Single-Precision
0F 01 C8 monitor MONITOR Legacy Monitor
0F 01 FA monitorx MONITORX AMD Monitor Extended
88/89/8A/8B mov MOV r/m, r Legacy Move
89 mov MOV r/m, r Legacy Move
0F 22 /r mov cr MOV CRn, r System Move Control Register
0F 23 /r mov dr MOV DRn, r System Move Debug Register
66 0F 28 movapd MOVAPD xmm, xmm/m128 SSE2 Move Aligned Packed Double-Precision
0F 28 movaps MOVAPS xmm, xmm/m128 SSE Move Aligned Packed Single-Precision
0F 38 F0 movbe MOVBE r, m Legacy Move Big-Endian
0F 6E movd MOVD mm/xmm, r32/m32 SSE Move Doubleword
F2 0F 12 movddup MOVDDUP xmm1, xmm2/m64 SSE3 Move One Double-FP and Duplicate
66 0F 38 F8 movdir64b MOVDIR64B m512, m512 Legacy Move Direct Store 64-Bytes
0F 38 F9 movdiri MOVDIRI m, r Legacy Move Direct Store Integer
66 0F 6F movdqa MOVDQA xmm, xmm/m128 SSE2 Move Aligned Packed Integer
F3 0F 6F movdqu MOVDQU xmm, xmm/m128 SSE2 Move Unaligned Packed Integer
66 0F 50 movmskpd MOVMSKPD r32, xmm SSE2 Extract Packed Double-Precision Mask
0F 50 movmskps MOVMSKPS r32, xmm SSE Extract Packed Single-Precision Mask
66 0F 38 2A movntdqa MOVNTDQA xmm1, m128 SSE4.1 Load Double Quadword Non-Temporal Aligned
0F C3 movnti MOVNTI m32, r32 SSE2 Move Non-Temporal Integer
66 0F 2B movntpd MOVNTPD m128, xmm SSE2 Move Non-Temporal Packed Double
0F 2B movntps MOVNTPS m128, xmm SSE Move Non-Temporal Packed Single
0F E7 movntq MOVNTQ m64, mm SSE Move Non-Temporal Quadword
F2 0F 2B movntsd MOVNTSD m64, xmm1 SSE4a Move Non-Temporal Scalar Double
F3 0F 2B movntss MOVNTSS m32, xmm1 SSE4a Move Non-Temporal Scalar Single
0F 6F movq MOVQ mm, mm/m64 MMX Move Quadword (MMX)
F3 0F 7E movq MOVQ xmm, xmm/m64 SSE2 Move Quadword
F2 0F 10 movsd MOVSD xmm1, xmm2/m64 SSE2 Move Scalar Double-Precision
A5 movsd MOVSD Legacy Move String Doubleword
F3 0F 16 movshdup MOVSHDUP xmm1, xmm2/m128 SSE3 Move Packed Single-FP High and Duplicate
F3 0F 12 movsldup MOVSLDUP xmm1, xmm2/m128 SSE3 Move Packed Single-FP Low and Duplicate
48 A5 movsq MOVSQ Legacy Move String Quadword
F3 0F 10 movss MOVSS xmm1, xmm2/m32 SSE Move Scalar Single-Precision
66 A5 movsw MOVSW Legacy Move String Word
0F BE movsx MOVSX r, r/m Legacy Move with Sign-Extension
63 movsxd MOVSXD r64, r/m32 Base (64-bit) Move with Sign-Extension Doubleword
66 0F 10 movupd MOVUPD xmm, xmm/m128 SSE2 Move Unaligned Packed Double-Precision
0F 10 movups MOVUPS xmm, xmm/m128 SSE Move Unaligned Packed Single-Precision
0F B6 movzx MOVZX r, r/m Legacy Move with Zero-Extension
66 0F 3A 42 mpsadbw MPSADBW xmm1, xmm2/m128, imm8 SSE4.1 Compute Multiple Sums of Absolute Differences
F7 /4 mul MUL r/m Legacy Unsigned Multiply
66 0F 59 mulpd MULPD xmm, xmm/m128 SSE2 Multiply Packed Double-Precision
0F 59 mulps MULPS xmm, xmm/m128 SSE Multiply Packed Single-Precision
F2 0F 59 mulsd MULSD xmm1, xmm2/m64 SSE2 Multiply Scalar Double-Precision
F3 0F 59 mulss MULSS xmm1, xmm2/m32 SSE Multiply Scalar Single-Precision
C4 ... F6 mulx MULX r32, r32, r/m32 VEX Unsigned Multiply Without Affecting Flags
0F 01 C9 mwait MWAIT Legacy Monitor Wait
0F 01 FB mwaitx MWAITX AMD Monitor Wait Extended
F7 /3 neg NEG r/m Legacy Two's Complement Negation
90 nop NOP Legacy No Operation
F7 /2 not NOT r/m Legacy One's Complement Negation
08-0D or OR r/m, r Legacy Logical OR
09 or OR r/m, r Legacy Logical OR
0F 56 orps ORPS xmm, xmm/m128 SSE Bitwise Logical OR Packed Single-Precision
E6 out OUT imm8, AL Legacy Output to Port
EE/EF out_var OUT DX, AL/AX/EAX Legacy Output to Port (Variable)
6E outs OUTSB Legacy Output String to Port
6F outsd OUTSD Legacy Output String Doubleword to Port
66 6F outsw OUTSW Legacy Output String Word to Port
66 0F 38 1C pabsb PABSB xmm1, xmm2/m128 SSSE3 Packed Absolute Value Byte
66 0F 6B packssdw PACKSSDW xmm, xmm/m128 SSE2 Pack with Signed Saturation Doubleword to Word
66 0F 63 packsswb PACKSSWB xmm, xmm/m128 SSE2 Pack with Signed Saturation Word to Byte
66 0F 38 2B packusdw PACKUSDW xmm1, xmm2/m128 SSE4.1 Pack with Unsigned Saturation Doubleword to Word
66 0F 67 packuswb PACKUSWB xmm1, xmm2/m128 SSE2 Pack with Unsigned Saturation Word to Byte
66 0F FC paddb PADDB xmm, xmm/m128 SSE2 Packed Add Bytes
66 0F FE paddd PADDD xmm, xmm/m128 SSE2 Packed Add Doublewords
66 0F D4 paddq PADDQ xmm, xmm/m128 SSE2 Packed Add Quadwords
0F EC paddsb PADDSB mm, mm/m64 MMX Packed Add Signed Saturate Byte (MMX)
66 0F EC paddsb PADDSB xmm, xmm/m128 SSE2 Packed Add Bytes Signed Saturate
0F ED paddsw PADDSW mm, mm/m64 MMX Packed Add Signed Saturate Word (MMX)
66 0F ED paddsw PADDSW xmm1, xmm2/m128 SSE2 Packed Add Signed Saturation Word
0F DC paddusb PADDUSB mm, mm/m64 MMX Packed Add Unsigned Saturate Byte (MMX)
66 0F DC paddusb PADDUSB xmm, xmm/m128 SSE2 Packed Add Bytes Unsigned Saturate
0F DD paddusw PADDUSW mm, mm/m64 MMX Packed Add Unsigned Saturate Word (MMX)
66 0F DD paddusw PADDUSW xmm1, xmm2/m128 SSE2 Packed Add Unsigned Saturation Word
66 0F FD paddw PADDW xmm, xmm/m128 SSE2 Packed Add Words
66 0F 3A 0F palignr PALIGNR xmm1, xmm2/m128, imm8 SSSE3 Packed Align Right
0F DB pand PAND mm, mm/m64 MMX Packed Logical AND (MMX)
66 0F DB pand PAND xmm, xmm/m128 SSE2 Packed Logical AND
0F DF pandn PANDN mm, mm/m64 MMX Packed Logical AND NOT (MMX)
F3 90 pause PAUSE Legacy Spin Loop Hint
66 0F E0 pavgb PAVGB xmm1, xmm2/m128 SSE2 Average Packed Integers (Byte)
66 0F E3 pavgw PAVGW xmm1, xmm2/m128 SSE2 Average Packed Integers (Word)
66 0F 38 10 pblendvb PBLENDVB xmm1, xmm2/m128, <XMM0> SSE4.1 Variable Blend Packed Bytes
66 0F 3A 0E pblendw PBLENDW xmm1, xmm2/m128, imm8 SSE4.1 Packed Blend Words
66 0F 3A 44 pclmulqdq PCLMULQDQ xmm1, xmm2/m128, imm8 PCLMUL Carry-Less Multiplication
0F 74 pcmpeqb PCMPEQB mm, mm/m64 MMX Packed Compare Equal Byte (MMX)
66 0F 74 pcmpeqb PCMPEQB xmm, xmm/m128 SSE2 Packed Compare Equal Byte
0F 76 pcmpeqd PCMPEQD mm, mm/m64 MMX Packed Compare Equal Doubleword (MMX)
66 0F 76 pcmpeqd PCMPEQD xmm, xmm/m128 SSE2 Packed Compare Equal Doubleword
66 0F 38 29 pcmpeqq PCMPEQQ xmm1, xmm2/m128 SSE4.1 Packed Compare Equal Quadword
0F 75 pcmpeqw PCMPEQW mm, mm/m64 MMX Packed Compare Equal Word (MMX)
66 0F 75 pcmpeqw PCMPEQW xmm, xmm/m128 SSE2 Packed Compare Equal Word
66 0F 3A 61 pcmpestri PCMPESTRI xmm1, xmm2/m128, imm8 SSE4.2 Packed Compare Explicit Length Strings, Return Index
66 0F 3A 60 pcmpestrm PCMPESTRM xmm1, xmm2/m128, imm8 SSE4.2 Packed Compare Explicit Length Strings, Return Mask
0F 64 pcmpgtb PCMPGTB mm, mm/m64 MMX Packed Compare Greater Than Byte (MMX)
66 0F 64 pcmpgtb PCMPGTB xmm1, xmm2/m128 SSE2 Packed Compare Greater Than Byte
0F 66 pcmpgtd PCMPGTD mm, mm/m64 MMX Packed Compare Greater Than Doubleword (MMX)
66 0F 66 pcmpgtd PCMPGTD xmm1, xmm2/m128 SSE2 Packed Compare Greater Than Doubleword
66 0F 38 37 pcmpgtq PCMPGTQ xmm1, xmm2/m128 SSE4.2 Packed Compare Greater Than Quadword
0F 65 pcmpgtw PCMPGTW mm, mm/m64 MMX Packed Compare Greater Than Word (MMX)
66 0F 65 pcmpgtw PCMPGTW xmm1, xmm2/m128 SSE2 Packed Compare Greater Than Word
66 0F 3A 63 pcmpistri PCMPISTRI xmm1, xmm2/m128, imm8 SSE4.2 Packed Compare Implicit Length Strings, Return Index
0F 01 C5 pconfig PCONFIG Legacy Platform Configuration
C4 ... F5 pdep PDEP r32, r32, r/m32 VEX Parallel Bits Deposit
C4 ... F5 pext PEXT r32, r32, r/m32 VEX Parallel Bits Extract
66 0F 3A 14 pextrb PEXTRB r32/m8, xmm1, imm8 SSE4.1 Packed Extract Byte
66 0F 3A 16 pextrd PEXTRD r32/m32, xmm1, imm8 SSE4.1 Packed Extract Doubleword
66 0F 3A 16 pextrq PEXTRQ r64/m64, xmm1, imm8 SSE4.1 Packed Extract Quadword
66 0F C5 pextrw PEXTRW r32, xmm1, imm8 SSE Packed Extract Word
0F 0F /r 9E pfadd PFADD mm, mm/m64 3DNow! Packed Floating-Point Add
0F 0F /r B4 pfmul PFMUL mm, mm/m64 3DNow! Packed Floating-Point Multiply
0F 0F /r 96 pfrcp PFRCP mm, mm/m64 3DNow! Packed Floating-Point Reciprocal
0F 0F /r 97 pfrsqrt PFRSQRT mm, mm/m64 3DNow! Packed Floating-Point Reciprocal Square Root
0F 0F /r 9A pfsub PFSUB mm, mm/m64 3DNow! Packed Floating-Point Subtract
66 0F 38 01 phaddw PHADDW xmm1, xmm2/m128 SSSE3 Packed Horizontal Add Word
66 0F 38 41 phminposuw PHMINPOSUW xmm1, xmm2/m128 SSE4.1 Packed Horizontal Minimum
66 0F 38 06 phsubd PHSUBD xmm1, xmm2/m128 SSSE3 Packed Horizontal Subtract Doubleword
66 0F 38 05 phsubw PHSUBW xmm1, xmm2/m128 SSSE3 Packed Horizontal Subtract Word
66 0F 3A 20 pinsrb PINSRB xmm1, r32/m8, imm8 SSE4.1 Packed Insert Byte
66 0F 3A 22 pinsrd PINSRD xmm1, r32/m32, imm8 SSE4.1 Packed Insert Doubleword
66 0F 3A 22 pinsrq PINSRQ xmm1, r64/m64, imm8 SSE4.1 Packed Insert Quadword
66 0F C4 pinsrw PINSRW xmm1, r32/m16, imm8 SSE Packed Insert Word
66 0F 38 04 pmaddubsw PMADDUBSW xmm1, xmm2/m128 SSSE3 Multiply and Add Packed Signed and Unsigned Bytes
0F F5 pmaddwd PMADDWD mm, mm/m64 MMX Packed Multiply Add Word to Doubleword (MMX)
66 0F F5 pmaddwd PMADDWD xmm1, xmm2/m128 SSE2 Packed Multiply and Add Word to Doubleword
66 0F 38 3C pmaxsb PMAXSB xmm1, xmm2/m128 SSE4.1 Maximum of Packed Signed Byte Integers
66 0F 38 3D pmaxsd PMAXSD xmm1, xmm2/m128 SSE4.1 Maximum of Packed Signed Doubleword Integers
66 0F EE pmaxsw PMAXSW xmm1, xmm2/m128 SSE2 Maximum of Packed Signed Word Integers
66 0F DE pmaxub PMAXUB xmm1, xmm2/m128 SSE2 Maximum of Packed Unsigned Byte Integers
66 0F 38 3F pmaxud PMAXUD xmm1, xmm2/m128 SSE4.1 Maximum of Packed Unsigned Doubleword Integers
66 0F 38 3E pmaxuw PMAXUW xmm1, xmm2/m128 SSE4.1 Maximum of Packed Unsigned Word Integers
66 0F 38 38 pminsb PMINSB xmm1, xmm2/m128 SSE4.1 Minimum of Packed Signed Byte Integers
66 0F 38 39 pminsd PMINSD xmm1, xmm2/m128 SSE4.1 Minimum of Packed Signed Doubleword Integers
66 0F EA pminsw PMINSW xmm1, xmm2/m128 SSE2 Minimum of Packed Signed Word Integers
66 0F DA pminub PMINUB xmm1, xmm2/m128 SSE2 Minimum of Packed Unsigned Byte Integers
66 0F 38 3B pminud PMINUD xmm1, xmm2/m128 SSE4.1 Minimum of Packed Unsigned Doubleword Integers
66 0F 38 3A pminuw PMINUW xmm1, xmm2/m128 SSE4.1 Minimum of Packed Unsigned Word Integers
66 0F D7 pmovmskb PMOVMSKB r32, xmm SSE2 Move Byte Mask
66 0F 38 22 pmovsxbq PMOVSXBQ xmm1, xmm2/m16 SSE4.1 Packed Move with Sign Extend Byte to Quadword
66 0F 38 20 pmovsxbw PMOVSXBW xmm1, xmm2/m64 SSE4.1 Packed Move with Sign Extend Byte to Word
66 0F 38 25 pmovsxdq PMOVSXDQ xmm1, xmm2/m64 SSE4.1 Packed Move with Sign Extend Doubleword to Quadword
66 0F 38 23 pmovsxwd PMOVSXWD xmm1, xmm2/m64 SSE4.1 Packed Move with Sign Extend Word to Doubleword
66 0F 38 24 pmovsxwq PMOVSXWQ xmm1, xmm2/m32 SSE4.1 Packed Move with Sign Extend Word to Quadword
66 0F 38 31 pmovzxbd PMOVZXBD xmm1, xmm2/m32 SSE4.1 Packed Move with Zero Extend Byte to Doubleword
66 0F 38 32 pmovzxbq PMOVZXBQ xmm1, xmm2/m16 SSE4.1 Packed Move with Zero Extend Byte to Quadword
66 0F 38 30 pmovzxbw PMOVZXBW xmm1, xmm2/m64 SSE4.1 Packed Move with Zero Extend Byte to Word
66 0F 38 35 pmovzxdq PMOVZXDQ xmm1, xmm2/m64 SSE4.1 Packed Move with Zero Extend Doubleword to Quadword
66 0F 38 33 pmovzxwd PMOVZXWD xmm1, xmm2/m64 SSE4.1 Packed Move with Zero Extend Word to Doubleword
66 0F 38 34 pmovzxwq PMOVZXWQ xmm1, xmm2/m32 SSE4.1 Packed Move with Zero Extend Word to Quadword
66 0F 38 0B pmulhrsw PMULHRSW xmm1, xmm2/m128 SSSE3 Packed Multiply High with Round and Scale
66 0F E4 pmulhuw PMULHUW xmm1, xmm2/m128 SSE2 Packed Multiply High Unsigned
0F E5 pmulhw PMULHW mm, mm/m64 MMX Packed Multiply High Word (MMX)
66 0F E5 pmulhw PMULHW xmm1, xmm2/m128 SSE2 Packed Multiply High Signed
66 0F 38 40 pmulld PMULLD xmm1, xmm2/m128 SSE4.1 Packed Multiply Low Doubleword
0F D5 pmullw PMULLW mm, mm/m64 MMX Packed Multiply Low Word (MMX)
66 0F D5 pmullw PMULLW xmm1, xmm2/m128 SSE2 Packed Multiply Low Word
66 0F F4 pmuludq PMULUDQ xmm1, xmm2/m128 SSE2 Multiply Packed Unsigned Doubleword Integers
8F /0 pop POP r/m Legacy Pop Value from Stack
61 popa POPA Legacy Pop All General-Purpose Registers
F3 0F B8 popcnt POPCNT r, r/m VEX Population Count
9D popf POPF Legacy Pop Flags
0F EB por POR mm, mm/m64 MMX Packed Logical OR (MMX)
66 0F EB por POR xmm, xmm/m128 SSE2 Packed Logical OR
0F 18 /0 prefetchnta PREFETCHNTA m8 SSE Prefetch Data using Non-Temporal Access
0F 18 /1 prefetcht0 PREFETCHT0 m8 SSE Prefetch Data into all Cache Levels
0F 18 /2 prefetcht1 PREFETCHT1 m8 SSE Prefetch Data to L2 Cache
0F 18 /3 prefetcht2 PREFETCHT2 m8 SSE Prefetch Data to L3 Cache
0F 0D /1 prefetchw PREFETCHW m8 Legacy Prefetch Data into Caches in Anticipation of a Write
0F 0D /2 prefetchwt1 PREFETCHWT1 m8 Legacy Prefetch Hint T1 with Intent to Write
66 0F F6 psadbw PSADBW xmm1, xmm2/m128 SSE2 Compute Sum of Absolute Differences
66 0F 38 00 pshufb PSHUFB xmm1, xmm2/m128 SSSE3 Packed Shuffle Bytes
66 0F 70 pshufd PSHUFD xmm, xmm/m128, imm8 SSE2 Packed Shuffle Doubleword
F3 0F 70 pshufhw PSHUFHW xmm1, xmm2/m128, imm8 SSE2 Packed Shuffle High Words
F2 0F 70 pshuflw PSHUFLW xmm1, xmm2/m128, imm8 SSE2 Packed Shuffle Low Words
66 0F 38 08 psignb PSIGNB xmm1, xmm2/m128 SSSE3 Packed Sign Byte
0F 72 /6 pslld PSLLD mm, imm8 MMX Packed Shift Left Logical Doubleword (MMX)
66 0F 72 /6 pslld PSLLD xmm, imm8 SSE2 Packed Shift Left Logical Doubleword
66 0F 73 /7 pslldq PSLLDQ xmm1, imm8 SSE2 Shift Double Quadword Left Logical
0F 73 /6 psllq PSLLQ mm, imm8 MMX Packed Shift Left Logical Quadword (MMX)
0F 71 /6 psllw PSLLW mm, imm8 MMX Packed Shift Left Logical Word (MMX)
66 0F 71 /6 psllw PSLLW xmm, imm8 SSE2 Packed Shift Left Logical Word
0F 72 /4 psrad PSRAD mm, imm8 MMX Packed Shift Right Arithmetic Doubleword (MMX)
66 0F 72 /4 psrad PSRAD xmm, imm8 SSE2 Packed Shift Right Arithmetic Doubleword
0F 71 /4 psraw PSRAW mm, imm8 MMX Packed Shift Right Arithmetic Word (MMX)
66 0F 71 /4 psraw PSRAW xmm, imm8 SSE2 Packed Shift Right Arithmetic Word
0F 72 /2 psrld PSRLD mm, imm8 MMX Packed Shift Right Logical Doubleword (MMX)
66 0F 72 /2 psrld PSRLD xmm, imm8 SSE2 Packed Shift Right Logical Doubleword
66 0F 73 /3 psrldq PSRLDQ xmm1, imm8 SSE2 Shift Double Quadword Right Logical
0F 73 /2 psrlq PSRLQ mm, imm8 MMX Packed Shift Right Logical Quadword (MMX)
0F 71 /2 psrlw PSRLW mm, imm8 MMX Packed Shift Right Logical Word (MMX)
66 0F 71 /2 psrlw PSRLW xmm, imm8 SSE2 Packed Shift Right Logical Word
66 0F F8 psubb PSUBB xmm, xmm/m128 SSE2 Packed Subtract Bytes
66 0F FA psubd PSUBD xmm, xmm/m128 SSE2 Packed Subtract Doublewords
66 0F FB psubq PSUBQ xmm1, xmm2/m128 SSE2 Packed Subtract Quadword
0F E8 psubsb PSUBSB mm, mm/m64 MMX Packed Subtract Signed Saturate Byte (MMX)
0F E9 psubsw PSUBSW mm, mm/m64 MMX Packed Subtract Signed Saturate Word (MMX)
66 0F E9 psubsw PSUBSW xmm1, xmm2/m128 SSE2 Packed Subtract Signed Saturation Word
0F D8 psubusb PSUBUSB mm, mm/m64 MMX Packed Subtract Unsigned Saturate Byte (MMX)
0F D9 psubusw PSUBUSW mm, mm/m64 MMX Packed Subtract Unsigned Saturate Word (MMX)
66 0F D9 psubusw PSUBUSW xmm1, xmm2/m128 SSE2 Packed Subtract Unsigned Saturation Word
66 0F F9 psubw PSUBW xmm, xmm/m128 SSE2 Packed Subtract Words
66 0F 38 17 ptest PTEST xmm1, xmm2/m128 SSE4.1 Packed Logical Comparison
F3 0F AE /4 ptwrite PTWRITE r32/r64 Legacy Write Data to Processor Trace
66 0F 68 punpckhbw PUNPCKHBW xmm1, xmm2/m128 SSE2 Unpack High Data Bytes
66 0F 6A punpckhdq PUNPCKHDQ xmm1, xmm2/m128 SSE2 Unpack High Data Doublewords
66 0F 6D punpckhqdq PUNPCKHQDQ xmm1, xmm2/m128 SSE2 Unpack High Data Quadwords
66 0F 69 punpckhwd PUNPCKHWD xmm1, xmm2/m128 SSE2 Unpack High Data Words
66 0F 60 punpcklbw PUNPCKLBW xmm, xmm/m128 SSE2 Unpack Low Data Bytes
66 0F 62 punpckldq PUNPCKLDQ xmm, xmm/m128 SSE2 Unpack Low Data Doublewords
66 0F 6C punpcklqdq PUNPCKLQDQ xmm, xmm/m128 SSE2 Unpack Low Data Quadwords
66 0F 61 punpcklwd PUNPCKLWD xmm, xmm/m128 SSE2 Unpack Low Data Words
FF /6 push PUSH r/m Legacy Push Word/Doubleword/Quadword Onto Stack
60 pusha PUSHA Legacy Push All General-Purpose Registers
9C pushf PUSHF Legacy Push Flags
0F EF pxor PXOR mm, mm/m64 MMX Packed Logical XOR (MMX)
66 0F EF pxor PXOR xmm, xmm/m128 SSE2 Packed Logical Exclusive OR
C1 /2 rcl RCL r/m, imm8 Legacy Rotate Carry Left
0F 53 rcpps RCPPS xmm, xmm/m128 SSE Reciprocal Packed Single-Precision
F3 0F 53 rcpss RCPSS xmm1, xmm2/m32 SSE Reciprocal Scalar Single-Precision
C1 /3 rcr RCR r/m, imm8 Legacy Rotate Carry Right
F3 0F AE /0 rdfsbase RDFSBASE r64 Legacy Read FS Base
F3 0F AE /1 rdgsbase RDGSBASE r64 Legacy Read GS Base
0F 32 rdmsr RDMSR System Read Model Specific Register
F3 0F C7 /7 rdpid RDPID r32 Legacy Read Processor ID
0F 01 EE rdpkru RDPKRU Legacy Read Protection Key Rights
0F 33 rdpmc RDPMC System Read Performance-Monitoring Counters
0F C7 /6 rdrand RDRAND r32 Legacy Read Random Number
0F C7 /6 rdrand RDRAND r16/r32/r64 Legacy Read Random Number
0F C7 /7 rdseed RDSEED r32 Legacy Read Random Seed
0F C7 /7 rdseed RDSEED r16/r32/r64 Legacy Read Random Seed
F3 0F 1E /1 rdsspq RDSSPQ r64 Legacy Read Shadow Stack Pointer (Quadword)
0F 31 rdtsc RDTSC Legacy Read Time-Stamp Counter
0F 01 F9 rdtscp RDTSCP Legacy Read Time-Stamp Counter and Processor ID
F3 A4/A5 rep movs REP MOVS m, m Legacy Repeat Move String
F3 AA/AB rep stos REP STOS m Legacy Repeat Store String
F3 A6/A7 repe cmps REPE CMPS m, m Legacy Repeat Compare String Equal
F2 AE/AF repne scas REPNE SCAS m Legacy Repeat Scan String Not Equal
C3 ret RET Legacy Return from Procedure
C1 /0 rol ROL r/m, imm8 Legacy Rotate Left
C1 /1 ror ROR r/m, imm8 Legacy Rotate Right
C4 ... F0 rorx RORX r32, r/m32, imm8 VEX Rotate Right Logical Without Affecting Flags
66 0F 3A 09 roundpd ROUNDPD xmm1, xmm2/m128, imm8 SSE4.1 Round Packed Double-Precision
66 0F 3A 08 roundps ROUNDPS xmm1, xmm2/m128, imm8 SSE4.1 Round Packed Single-Precision
66 0F 3A 0B roundsd ROUNDSD xmm1, xmm2/m64, imm8 SSE4.1 Round Scalar Double-Precision
66 0F 3A 0A roundss ROUNDSS xmm1, xmm2/m32, imm8 SSE4.1 Round Scalar Single-Precision
0F AA rsm RSM System Resume from System Management Mode
0F 52 rsqrtps RSQRTPS xmm, xmm/m128 SSE Reciprocal Square Root Packed Single-Precision
F3 0F 52 rsqrtss RSQRTSS xmm1, xmm2/m32 SSE Reciprocal Square Root Scalar Single-Precision
F3 0F 01 /5 rstorssp RSTORSSP m64 Legacy Restore Shadow Stack Pointer
9E sahf SAHF Legacy Store AH into Flags
C1 /4 sal SAL r/m, imm8 Legacy Shift Arithmetic Left
C1 /7 sar SAR r/m, imm8 Legacy Shift Arithmetic Right
C4 ... F7 sarx SARX r32, r/m32, r32 VEX Shift Arithmetic Right Without Affecting Flags
F3 0F 01 EA saveprevssp SAVEPREVSSP Legacy Save Previous Shadow Stack Pointer
19 sbb SBB r/m, r Legacy Subtract with Borrow
AE scas SCASB Legacy Scan String
AF scasd SCASD Legacy Scan String Doubleword
48 AF scasq SCASQ Legacy Scan String Quadword
66 AF scasw SCASW Legacy Scan String Word
F3 0F C7 /6 senduipi SENDUIPI r64 Legacy Send User Inter-Processor Interrupt
0F 01 E8 serialize SERIALIZE Legacy Serialize Instruction Execution
0F 97 seta SETA r/m8 Legacy Set Byte on Above
0F 93 setae SETAE r/m8 Legacy Set Byte on Above or Equal
0F 92 setb SETB r/m8 Legacy Set Byte on Below
0F 96 setbe SETBE r/m8 Legacy Set Byte on Below or Equal
0F 9x setcc SETcc r/m8 Legacy Set Byte on Condition
0F 9F setg SETG r/m8 Legacy Set Byte on Greater
0F 9D setge SETGE r/m8 Legacy Set Byte on Greater or Equal
0F 9C setl SETL r/m8 Legacy Set Byte on Less
0F 9E setle SETLE r/m8 Legacy Set Byte on Less or Equal
0F 91 setno SETNO r/m8 Legacy Set Byte on Not Overflow
0F 9B setnp SETNP r/m8 Legacy Set Byte on Not Parity
0F 99 setns SETNS r/m8 Legacy Set Byte on Not Sign
0F 95 setnz SETNZ r/m8 Legacy Set Byte on Not Zero
0F 90 seto SETO r/m8 Legacy Set Byte on Overflow
0F 9A setp SETP r/m8 Legacy Set Byte on Parity
0F 98 sets SETS r/m8 Legacy Set Byte on Sign
0F 94 setz SETZ r/m8 Legacy Set Byte on Zero
0F AE F8 sfence SFENCE SSE Store Fence
0F 01 /0 sgdt SGDT m System Store Global Descriptor Table Register
0F 38 C9 sha1msg1 SHA1MSG1 xmm1, xmm2/m128 Legacy SHA1 Message Schedule 1
0F 38 CA sha1msg2 SHA1MSG2 xmm1, xmm2/m128 Legacy SHA1 Message Schedule 2
0F 38 C8 sha1nexte SHA1NEXTE xmm1, xmm2/m128 Legacy SHA1 State Variable E
0F 3A CC sha1rnds4 SHA1RNDS4 xmm1, xmm2/m128, imm8 Legacy SHA1 Rounds 4
0F 38 CC sha256msg1 SHA256MSG1 xmm1, xmm2/m128 Legacy SHA256 Message Schedule 1
0F 38 CD sha256msg2 SHA256MSG2 xmm1, xmm2/m128 Legacy SHA256 Message Schedule 2
0F 38 CB sha256rnds2 SHA256RNDS2 xmm1, xmm2/m128, xmm0 Legacy SHA256 Rounds 2
C1 /4 shl SHL r/m, imm8 Legacy Shift Logical Left
0F A4 shld SHLD r/m, r, imm8 Legacy Double Precision Shift Left
C4 ... F7 shlx SHLX r32, r/m32, r32 VEX Shift Logical Left Without Affecting Flags
C1 /5 shr SHR r/m, imm8 Legacy Shift Logical Right
0F AC shrd SHRD r/m, r, imm8 Legacy Double Precision Shift Right
C4 ... F7 shrx SHRX r32, r/m32, r32 VEX Shift Logical Right Without Affecting Flags
66 0F C6 shufpd SHUFPD xmm1, xmm2/m128, imm8 SSE2 Shuffle Packed Double-Precision
66 0F C6 shufpd SHUFPD xmm, xmm/m128, imm8 SSE2 Shuffle Packed Double-Precision
0F C6 shufps SHUFPS xmm1, xmm2/m128, imm8 SSE Shuffle Packed Single-Precision
0F C6 shufps SHUFPS xmm, xmm/m128, imm8 SSE Shuffle Packed Single-Precision
0F 01 /1 sidt SIDT m System Store Interrupt Descriptor Table Register
0F 00 /0 sldt SLDT r/m16 System Store Local Descriptor Table Register
0F 01 /4 smsw SMSW r/m16 System Store Machine Status Word
66 0F 51 sqrtpd SQRTPD xmm, xmm/m128 SSE2 Square Root Packed Double-Precision
0F 51 sqrtps SQRTPS xmm, xmm/m128 SSE Square Root Packed Single-Precision
F2 0F 51 sqrtsd SQRTSD xmm1, xmm2/m64 SSE2 Square Root Scalar Double-Precision
F3 0F 51 sqrtss SQRTSS xmm1, xmm2/m32 SSE Square Root Scalar Single-Precision
0F 01 CB stac STAC Legacy Set AC Flag in EFLAGS
F9 stc STC Legacy Set Carry Flag
FD std STD Legacy Set Direction Flag
0F 01 DC stgi STGI SVM Set Global Interrupt Flag
FB sti STI Legacy Set Interrupt Flag
0F AE /3 stmxcsr STMXCSR m32 SSE Store MXCSR Register
AA stos STOSB Legacy Store String
AA stosd STOSD Legacy Store String Doubleword
48 AA stosq STOSQ Legacy Store String Quadword
66 AA stosw STOSW Legacy Store String Word
0F 00 /1 str STR r/m16 System Store Task Register
C4 ... 49 sttilecfg STTILECFG m512 VEX Store Tile Configuration
F3 0F 01 EF stui STUI Legacy Set User Interrupt Flag
28-2D sub SUB r/m, r Legacy Subtract
29 sub SUB r/m, r Legacy Subtract
66 0F 5C subpd SUBPD xmm, xmm/m128 SSE2 Subtract Packed Double-Precision
0F 5C subps SUBPS xmm, xmm/m128 SSE Subtract Packed Single-Precision
F2 0F 5C subsd SUBSD xmm1, xmm2/m64 SSE2 Subtract Scalar Double-Precision
F3 0F 5C subss SUBSS xmm1, xmm2/m32 SSE Subtract Scalar Single-Precision
0F 01 F8 swapgs SWAPGS Legacy Swap GS Base Register
0F 05 syscall SYSCALL System System Call
0F 34 sysenter SYSENTER System Fast System Call
0F 35 sysexit SYSEXIT System Fast Return from System Call
0F 07 sysret SYSRET System Return from System Call
8F ... 07 t1mskc T1MSKC r32, r/m32 TBM Inverse Mask From Trailing Ones
C4 ... 5C tdpbf16ps TDPBF16PS tmm1, tmm2, tmm3 VEX Tile Dot Product BFloat16 Packed Single
C4 ... 5E tdpbssd TDPBSSD tmm1, tmm2, tmm3 VEX Tile Dot Product Byte Signed Signed Doubleword
C4 ... 5E tdpbsud TDPBSUD tmm1, tmm2, tmm3 VEX Tile Dot Product Byte Signed Unsigned Doubleword
C4 ... 5E tdpbusd TDPBUSD tmm1, tmm2, tmm3 VEX Tile Dot Product Byte Unsigned Signed Doubleword
C4 ... 5E tdpbuud TDPBUUD tmm1, tmm2, tmm3 VEX Tile Dot Product Byte Unsigned Unsigned Doubleword
C4 ... 5C tdpfp16ps TDPFP16PS tmm1, tmm2, tmm3 VEX Tile Dot Product FP16 Packed Single
84-85 test TEST r/m, r Legacy Logical Compare
85 test TEST r/m, r Legacy Logical Compare
F3 0F 01 ED testui TESTUI Legacy Test User Interrupt
C4 ... 4B tileloadd TILELOADD tmm1, m VEX Load Tile Data
C4 ... 4B tileloaddt1 TILELOADDT1 tmm1, m VEX Load Tile Data (T1 Hint)
C4 ... 4B tilestored TILESTORED m, tmm1 VEX Store Tile Data
C4 ... 49 tilezero TILEZERO tmm1 VEX Zero Tile
66 0F AE /6 tpause TPAUSE r32 Legacy Timed Pause
F2 0F 01 E8 tsxldtrk TSXLDTRK Legacy TSX Load Tracking
F3 0F BC tzcnt TZCNT r32, r/m32 Legacy Count Trailing Zeros
8F ... 04 tzmsk TZMSK r32, r/m32 TBM Mask From Trailing Zeros
66 0F 2E ucomisd UCOMISD xmm1, xmm2/m64 SSE2 Unordered Compare Scalar Double-Precision
66 0F 2E ucomisd UCOMISD xmm, xmm/m64 SSE2 Unordered Compare Scalar Double-Precision
0F 2E ucomiss UCOMISS xmm1, xmm2/m32 SSE Unordered Compare Scalar Single-Precision
0F 2E ucomiss UCOMISS xmm, xmm/m32 SSE Unordered Compare Scalar Single-Precision
0F FF ud0 UD0 Legacy Undefined Instruction 0
0F 0B ud2 UD2 Legacy Undefined Instruction
F3 0F 01 EC uiret UIRET Legacy User Interrupt Return
F3 0F AE /6 umonitor UMONITOR r64 Legacy User Level Monitor
F2 0F AE /6 umwait UMWAIT r32 Legacy User Level Monitor Wait
66 0F 15 unpckhpd UNPCKHPD xmm1, xmm2/m128 SSE2 Unpack High Packed Double-Precision
0F 15 unpckhps UNPCKHPS xmm1, xmm2/m128 SSE Unpack High Packed Single-Precision
66 0F 14 unpcklpd UNPCKLPD xmm1, xmm2/m128 SSE2 Unpack Low Packed Double-Precision
0F 14 unpcklps UNPCKLPS xmm1, xmm2/m128 SSE Unpack Low Packed Single-Precision
62 F2 ... 9A v4fmaddps V4FMADDPS zmm1 {k1}, zmm2+3, m128 EVEX Fused Multiply-Add Packed Single (4-iterations)
62 F2 ... 9B v4fmaddss V4FMADDSS xmm1 {k1}, xmm2+3, m128 EVEX Fused Multiply-Add Scalar Single (4-iterations)
62 F2 ... AA v4fnmaddps V4FNMADDPS zmm1 {k1}, zmm2+3, m128 EVEX Fused Negative Multiply-Add Packed Single (4-iterations)
62 F2 ... AB v4fnmaddss V4FNMADDSS xmm1 {k1}, xmm2+3, m128 EVEX Fused Negative Multiply-Add Scalar Single (4-iterations)
58 vaddph VADDPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Add Packed FP16 Values
C5 /r 58 vaddps VADDPS ymm1, ymm2, ymm3/m256 VEX Add Packed Single-Precision (AVX)
58 vaddsh VADDSH xmm1 {k1}, xmm2, xmm3/m16 EVEX Add Scalar Half-Precision
58 vaddss VADDSS xmm1 {k1}, xmm2, xmm3/m32 EVEX Add Scalar Single-Precision (EVEX)
DE vaesdec VAESDEC zmm1, zmm2, zmm3/m512 EVEX Vector AES Decrypt (AVX512)
DC vaesenc VAESENC zmm1, zmm2, zmm3/m512 EVEX Vector AES Encrypt (AVX512)
66 0F 3A 03 valignd VALIGND zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Align Doubleword Vectors
66 0F 3A 03 valignq VALIGNQ zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Align Quadword Vectors
C4 ... 1A vbroadcastf128 VBROADCASTF128 ymm1, m128 VEX Broadcast 128-bit Floating-Point
C4 ... 5A vbroadcasti128 VBROADCASTI128 ymm1, m128 VEX Broadcast 128-bit Integer
C4 ... 19 vbroadcastsd VBROADCASTSD ymm1, m64 VEX Broadcast Scalar Double
C4 ... 18 vbroadcastss VBROADCASTSS ymm1, m32 AVX Broadcast Scalar Single
C5 ... C2 vcmppd VCMPPD ymm1, ymm2, ymm3/m256, imm8 VEX Compare Packed Double-Precision (AVX)
C5 ... C2 vcmpps VCMPPS ymm1, ymm2, ymm3/m256, imm8 VEX Compare Packed Single-Precision (AVX)
66 0F 38 8A vcompresspd VCOMPRESSPD m512 {k1}, zmm1 EVEX Store Sparse Packed Double-Precision Floating-Point Values
66 0F 38 8A vcompressps VCOMPRESSPS m512 {k1}, zmm1 EVEX Store Sparse Packed Single-Precision Floating-Point Values
0F 5B vcvtdq2ps VCVTDQ2PS ymm1, ymm2/m256 VEX Convert Packed Doubleword to Packed Single
72 vcvtne2ps2bf16 VCVTNE2PS2BF16 zmm1 {k1}, zmm2, zmm3/m512 EVEX Convert Two Packed Single to Packed BFloat16
0F 79 vcvtpd2udq VCVTPD2UDQ ymm1 {k1}, zmm2/m512 EVEX Convert Packed Double to Unsigned Doubleword
66 0F 79 vcvtpd2uq VCVTPD2UQ zmm1 {k1}, zmm2/m512 EVEX Convert Packed Double to Unsigned Quadword
66 0F 38 13 vcvtph2ps VCVTPH2PS xmm1, xmm2/m64 VEX Convert 16-bit FP to 32-bit FP
66 0F 5B vcvtps2dq VCVTPS2DQ ymm1, ymm2/m256 VEX Convert Packed Single to Packed Doubleword
66 0F 3A 1D vcvtps2ph VCVTPS2PH xmm1/m64, xmm2, imm8 VEX Convert 32-bit FP to 16-bit FP
0F 79 vcvtps2udq VCVTPS2UDQ zmm1 {k1}, zmm2/m512 EVEX Convert Packed Single to Unsigned Doubleword
66 0F 79 vcvtps2uq VCVTPS2UQ zmm1 {k1}, ymm2/m256 EVEX Convert Packed Single to Unsigned Quadword
F3 0F 5B vcvttps2dq VCVTTPS2DQ ymm1, ymm2/m256 VEX Convert with Truncation Packed Single to Doubleword
F3 0F 7A vcvtudq2pd VCVTUDQ2PD zmm1 {k1}, ymm2/m256 EVEX Convert Packed Unsigned Doubleword to Double
F2 0F 5B vcvtudq2ps VCVTUDQ2PS zmm1 {k1}, zmm2/m512 EVEX Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point
F3 0F 7A vcvtuq2pd VCVTUQ2PD zmm1 {k1}, zmm2/m512 EVEX Convert Packed Unsigned Quadword to Double
F2 0F 7A vcvtuq2ps VCVTUQ2PS ymm1 {k1}, zmm2/m512 EVEX Convert Packed Unsigned Quadword to Single
66 0F 3A 42 vdbpsadbw VDBPSADBW zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Double Block Packed Sum-Absolute-Differences
5E vdivph VDIVPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Divide Packed FP16 Values
5E vdivsh VDIVSH xmm1 {k1}, xmm2, xmm3/m16 EVEX Divide Scalar Half-Precision
52 vdpbf16ps VDPBF16PS zmm1 {k1}, zmm2, zmm3/m512 EVEX Dot Product BFloat16 to Packed Single
0F 00 /4 verr VERR r/m16 System Verify Segment for Reading
0F 00 /5 verw VERW r/m16 System Verify Segment for Writing
66 0F 38 88 vexpandpd VEXPANDPD zmm1 {k1}, m512 EVEX Load Sparse Packed Double-Precision Floating-Point Values
66 0F 38 88 vexpandps VEXPANDPS zmm1 {k1}, m512 EVEX Load Sparse Packed Single-Precision Floating-Point Values
C4 ... 19 vextractf128 VEXTRACTF128 xmm1/m128, ymm2, imm8 VEX Extract Float 128-bit
C4 ... 39 vextracti128 VEXTRACTI128 xmm1/m128, ymm2, imm8 VEX Extract Integer 128-bit
62 F6 ... 57 vfcmaddcph VFCMADDCPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Complex Conjugate Multiply-Add FP16
66 0F 3A 54 vfixupimmpd VFIXUPIMMPD zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Fix Up Special Packed Float64 Values
66 0F 3A 54 vfixupimmps VFIXUPIMMPS zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Fix Up Special Packed Float32 Values
66 0F 3A 55 vfixupimmss VFIXUPIMMSS xmm1 {k1}, xmm2, xmm3/m32, imm8 EVEX Fix Up Special Scalar Float32 Value
98 vfmadd132ph VFMADD132PH zmm1 {k1}, zmm2, zmm3/m512 EVEX Fused Multiply-Add (132) Packed FP16
C4 ... 98 vfmadd132ps VFMADD132PS ymm1, ymm2, ymm3/m256 VEX Fused Multiply-Add (132) Packed Single
99 vfmadd132sh VFMADD132SH xmm1 {k1}, xmm2, xmm3/m16 EVEX Fused Multiply-Add Scalar Half-Precision (132)
C4 ... 99 vfmadd132ss VFMADD132SS xmm1, xmm2, xmm3/m32 FMA3 Fused Multiply-Add Scalar Single (132)
A8 vfmadd213ph VFMADD213PH zmm1 {k1}, zmm2, zmm3/m512 EVEX Fused Multiply-Add (213) Packed FP16
C4 ... A8 vfmadd213ps VFMADD213PS ymm1, ymm2, ymm3/m256 VEX Fused Multiply-Add (213) Packed Single
C4 ... A9 vfmadd213ss VFMADD213SS xmm1, xmm2, xmm3/m32 FMA3 Fused Multiply-Add Scalar Single (213)
B8 vfmadd231ph VFMADD231PH zmm1 {k1}, zmm2, zmm3/m512 EVEX Fused Multiply-Add (231) Packed FP16
C4 ... B8 vfmadd231ps VFMADD231PS ymm1, ymm2, ymm3/m256 VEX Fused Multiply-Add (132)
C4 ... B9 vfmadd231ss VFMADD231SS xmm1, xmm2, xmm3/m32 FMA3 Fused Multiply-Add Scalar Single (231)
62 F6 ... 56 vfmaddcph VFMADDCPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Complex Multiply-Add FP16
62 F6 ... 57 vfmaddcsh VFMADDCSH xmm1 {k1}, xmm2, xmm3/m32 EVEX Complex Multiply-Add Scalar FP16
C4 ... 9A vfmsub132ps VFMSUB132PS ymm1, ymm2, ymm3/m256 VEX Fused Multiply-Subtract (132) Packed Single
C4 ... 9C vfnmadd132ps VFNMADD132PS ymm1, ymm2, ymm3/m256 VEX Fused Negative Multiply-Add (132) Packed Single
66 0F 3A 67 vfpclasspd VFPCLASSPD k1 {k2}, zmm2/m512, imm8 EVEX Floating-Point Class Double
66 0F 3A 66 vfpclassps VFPCLASSPS k1 {k2}, zmm2/m512, imm8 EVEX Floating-Point Class Single
C4 ... 92 vgatherdpd VGATHERDPD ymm1, [base+xmm_idx*scale], ymm_mask VEX Gather Packed Double Precision
C4 ... 92 vgatherdps VGATHERDPS ymm1, [base+ymm_idx*scale], ymm_mask VEX Gather Packed Single Precision
62 F2 ... C6 /1 vgatherpf0dpd VGATHERPF0DPD {k1}, [base+ymm_idx] EVEX Gather Prefetch Packed Double (L1)
62 F2 ... C6 /1 vgatherpf0dps VGATHERPF0DPS {k1}, [base+zmm_idx] EVEX Gather Prefetch Packed Single (L1)
62 F2 ... C7 /1 vgatherpf0qpd VGATHERPF0QPD {k1}, [base+zmm_idx] EVEX Gather Prefetch Packed Double (L1, Qword Indices)
62 F2 ... C7 /1 vgatherpf0qps VGATHERPF0QPS {k1}, [base+zmm_idx] EVEX Gather Prefetch Packed Single (L1, Qword Indices)
66 0F 38 42 vgetexppd VGETEXPPD zmm1 {k1}, zmm2/m512 EVEX Get Exponent Packed Double-Precision
66 0F 38 43 vgetexpss VGETEXPSS xmm1 {k1}, xmm2, xmm3/m32 EVEX Get Exponent Scalar Single
66 0F 3A 26 vgetmantpd VGETMANTPD zmm1 {k1}, zmm2/m512, imm8 EVEX Get Mantissa Packed Double-Precision
66 0F 3A 27 vgetmantsd VGETMANTSD xmm1 {k1}, xmm2, xmm3/m64, imm8 EVEX Get Mantissa Scalar Double
C4 ... 18 vinsertf128 VINSERTF128 ymm1, ymm2, xmm3/m128, imm8 VEX Insert Float 128-bit
C4 ... 38 vinserti128 VINSERTI128 ymm1, ymm2, xmm3/m128, imm8 VEX Insert Integer 128-bit
C4 ... 2D vmaskmovpd VMASKMOVPD ymm1, ymm2, m256 VEX Conditional Move Packed Double-Precision
C4 ... 2C vmaskmovps VMASKMOVPS ymm1, ymm2, m256 VEX Conditional Move Packed Single-Precision
5F vmaxph VMAXPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Maximum Packed FP16 Values
0F 01 C1 vmcall VMCALL VMX Call to VM Monitor
66 0F C7 /6 vmclear VMCLEAR m64 VMX Clear Virtual-Machine Control Structure
0F 01 D4 vmfunc VMFUNC VMX Virtual Machine Function
5D vminph VMINPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Minimum Packed FP16 Values
0F 01 C2 vmlaunch VMLAUNCH VMX Launch Virtual Machine
0F 01 DA vmload VMLOAD SVM Load State from VMCB
0F 01 C4 vmoff VMOFF VMX Leave VMX Operation
0F C7 /6 vmptrld VMPTRLD m64 VMX Load Pointer to VMCS
0F C7 /7 vmptrst VMPTRST m64 VMX Store Pointer to VMCS
0F 78 vmread VMREAD r/m64, r64 VMX Read Field from VMCS
0F 01 C3 vmresume VMRESUME VMX Resume Virtual Machine
0F 01 D8 vmrun VMRUN SVM Run Virtual Machine
0F 01 DB vmsave VMSAVE SVM Save State to VMCB
59 vmulph VMULPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Multiply Packed FP16 Values
C5 /r 59 vmulps VMULPS ymm1, ymm2, ymm3/m256 VEX Multiply Packed Single-Precision (AVX)
59 vmulsh VMULSH xmm1 {k1}, xmm2, xmm3/m16 EVEX Multiply Scalar Half-Precision
59 vmulss VMULSS xmm1 {k1}, xmm2, xmm3/m32 EVEX Multiply Scalar Single-Precision (EVEX)
0F 79 vmwrite VMWRITE r64, r/m64 VMX Write Field to VMCS
F3 0F C7 /6 vmxon VMXON m64 VMX Enter VMX Operation
F2 0F 38 68 vp2intersectd VP2INTERSECTD k1+1, zmm2, zmm3/m512 EVEX Compute Intersection Pair Doublewords
F2 0F 38 68 vp2intersectq VP2INTERSECTQ k1+1, zmm2, zmm3/m512 EVEX Compute Intersection Pair Quadwords
62 F2 ... 52 vp4dpwssd VP4DPWSSD zmm1 {k1}, zmm2+3, m128 EVEX Dot Product Signed Word to Signed Doubleword (4-iterations)
62 F2 ... 53 vp4dpwssds VP4DPWSSDS zmm1 {k1}, zmm2+3, m128 EVEX Dot Product Signed Word to Signed Doubleword Saturate (4-iter)
66 0F 38 1E vpabsd VPABSD zmm1 {k1}, zmm2/m512 EVEX Packed Absolute Value Doubleword
66 0F 38 1F vpabsq VPABSQ zmm1 {k1}, zmm2/m512 EVEX Packed Absolute Value Quadword
C5 ... FC vpaddb VPADDB ymm1, ymm2, ymm3/m256 VEX Packed Add Byte (AVX2)
C5 ... FE vpaddd VPADDD ymm1, ymm2, ymm3/m256 VEX Packed Add Doubleword (AVX2)
C4 ... 78 vpbroadcastb VPBROADCASTB ymm1, xmm2/m8 VEX Broadcast Byte
C4 ... 58 vpbroadcastd VPBROADCASTD ymm1, xmm2/m32 AVX2 Broadcast Doubleword
C4 ... 59 vpbroadcastq VPBROADCASTQ ymm1, xmm2/m64 VEX Broadcast Quadword
C4 ... 79 vpbroadcastw VPBROADCASTW ymm1, xmm2/m16 VEX Broadcast Word
44 vpclmulqdq VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8 EVEX Vector Carry-Less Multiplication (AVX512)
08 A2 vpcmov VPCMOV xmm1, xmm2, xmm3, xmm4 XOP Vector Packed Conditional Move
62 F3 ... 3F vpcmpb VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Byte Integers
62 F3 ... 1F vpcmpd VPCMPD k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Doubleword Integers
62 F3 ... 1F vpcmpq VPCMPQ k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Quadword Integers
62 F3 ... 3E vpcmpub VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Unsigned Byte Integers
62 F3 ... 1E vpcmpud VPCMPUD k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Unsigned Doubleword Integers
62 F3 ... 1E vpcmpuq VPCMPUQ k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Unsigned Quadword Integers
62 F3 ... 3E vpcmpuw VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Unsigned Word Integers
62 F3 ... 3F vpcmpw VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8 EVEX Compare Packed Word Integers
08 CC vpcomb VPCOMB xmm1, xmm2, xmm3/m128, imm8 XOP Vector Packed Compare Byte
66 0F 38 63 vpcompressb VPCOMPRESSB m512 {k1}, zmm1 EVEX Store Sparse Packed Byte Integer Values
66 0F 38 63 vpcompressw VPCOMPRESSW m512 {k1}, zmm1 EVEX Store Sparse Packed Word Integer Values
66 0F 38 C4 vpconflictd VPCONFLICTD zmm1 {k1}, zmm2/m512 EVEX Detect Conflicts Within a Vector of Packed Dword Values
66 0F 38 C4 vpconflictq VPCONFLICTQ zmm1 {k1}, zmm2/m512 EVEX Detect Conflicts Within a Vector of Packed Quadword Values
66 0F 38 50 vpdpbusd VPDPBUSD zmm1, zmm2, zmm3/m512 EVEX Multiply and Add Unsigned and Signed Bytes
66 0F 38 51 vpdpbusds VPDPBUSDS zmm1, zmm2, zmm3/m512 EVEX Multiply and Add Unsigned and Signed Bytes with Saturation
66 0F 38 52 vpdpwssd VPDPWSSD zmm1, zmm2, zmm3/m512 EVEX Multiply and Add Signed Words
66 0F 38 53 vpdpwssds VPDPWSSDS zmm1, zmm2, zmm3/m512 EVEX Multiply and Add Signed Words with Saturation
66 0F 3A 06 vperm2f128 VPERM2F128 ymm1, ymm2, ymm3/m256, imm8 VEX Permute Floating-Point 128-bit Blocks
C4 ... 46 vperm2i128 VPERM2I128 ymm1, ymm2, ymm3/m256, imm8 VEX Permute 128-bit Integer Blocks
66 0F 38 8D vpermb VPERMB zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Packed Bytes
C4 ... 36 vpermd VPERMD ymm1, ymm2, ymm3/m256 VEX Permute Doublewords
66 0F 38 75 vpermi2b VPERMI2B zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Bytes
66 0F 38 76 vpermi2d VPERMI2D zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Doublewords
66 0F 38 76 vpermi2q VPERMI2Q zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Quadwords
C4 ... 05 vpermilpd VPERMILPD ymm1, ymm2/m256, imm8 AVX Permute In-Lane Packed Double
C4 ... 04 vpermilps VPERMILPS ymm1, ymm2/m256, imm8 AVX Permute In-Lane Packed Single
C4 ... 16 vpermps VPERMPS ymm1, ymm2, ymm3/m256 VEX Permute Single-Precision Floating-Point
66 0F 3A 00 vpermq VPERMQ ymm1, ymm2/m256, imm8 VEX Permute Quadword Integers
66 0F 38 7D vpermt2b VPERMT2B zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Bytes (Overwrite)
66 0F 38 7F vpermt2d VPERMT2D zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Doublewords (Overwrite)
66 0F 38 7F vpermt2q VPERMT2Q zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Two-Source Quadwords (Overwrite)
66 0F 38 8D vpermw VPERMW zmm1 {k1}, zmm2, zmm3/m512 EVEX Permute Word Integers
66 0F 38 62 vpexpandb VPEXPANDB zmm1 {k1}, m512 EVEX Load Sparse Packed Byte Integer Values
66 0F 38 62 vpexpandw VPEXPANDW zmm1 {k1}, m512 EVEX Load Sparse Packed Word Integer Values
C4 ... 90 vpgatherdd VPGATHERDD ymm1, [base+ymm_idx*scale], ymm_mask VEX Gather Packed Doubleword with Signed Doubleword Indices
C4 ... 90 vpgatherdq VPGATHERDQ ymm1, [base+xmm_idx*scale], ymm_mask VEX Gather Packed Quadword with Signed Doubleword Indices
C4 ... 91 vpgatherqd VPGATHERQD xmm1, [base+ymm_idx*scale], xmm_mask VEX Gather Packed Doubleword with Signed Quadword Indices
C4 ... 91 vpgatherqq VPGATHERQQ ymm1, [base+ymm_idx*scale], ymm_mask VEX Gather Packed Quadword with Signed Quadword Indices
8F ... C2 vphaddbd VPHADDBD xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Byte to Doubleword
8F ... C3 vphaddbq VPHADDBQ xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Byte to Quadword
8F ... C1 vphaddbw VPHADDBW xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Byte to Word
8F ... CB vphadddq VPHADDDQ xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Doubleword to Quadword
8F ... C6 vphaddwd VPHADDWD xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Word to Doubleword
8F ... C7 vphaddwq VPHADDWQ xmm1, xmm2/m128 XOP Vector Packed Horizontal Add Word to Quadword
66 0F 38 44 vplzcntd VPLZCNTD zmm1 {k1}, zmm2/m512 EVEX Count Leading Zero Bits
66 0F 38 44 vplzcntq VPLZCNTQ zmm1 {k1}, zmm2/m512 EVEX Count Leading Zero Bits Quadword
8F ... 87 vpmacssww VPMACSSWW xmm1, xmm2, xmm3, xmm4 XOP Vector Packed Multiply Accumulate Signed Saturate Word
8F ... 83 vpmacsww VPMACSWW xmm1, xmm2, xmm3, xmm4 XOP Vector Packed Multiply Accumulate Signed Word
66 0F 38 B5 vpmadd52huq VPMADD52HUQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Packed Multiply-Add Unsigned 52-bit Integers (High)
66 0F 38 B4 vpmadd52luq VPMADD52LUQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Packed Multiply-Add Unsigned 52-bit Integers (Low)
66 0F 38 3D vpmaxsq VPMAXSQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Maximum of Packed Signed Quadword Integers
66 0F 38 3F vpmaxuq VPMAXUQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Maximum of Packed Unsigned Quadword Integers
66 0F 38 39 vpminsq VPMINSQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Minimum of Packed Signed Quadword Integers
66 0F 38 3B vpminuq VPMINUQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Minimum of Packed Unsigned Quadword Integers
62 F2 ... 29 vpmovb2m VPMOVB2M k1, zmm1 EVEX Move Byte Mask to Mask Register
62 F2 ... 39 vpmovd2m VPMOVD2M k1, zmm1 EVEX Move Doubleword Mask to Mask Register
F3 0F 38 31 vpmovdb VPMOVDB xmm1/m128 {k1}, zmm2 EVEX Truncate Doubleword to Byte
62 F2 ... 28 vpmovm2b VPMOVM2B zmm1, k1 EVEX Move Mask Register to Byte Mask
62 F2 ... 38 vpmovm2d VPMOVM2D zmm1, k1 EVEX Move Mask Register to Doubleword Mask
62 F2 ... 38 vpmovm2q VPMOVM2Q zmm1, k1 EVEX Move Mask Register to Quadword Mask
62 F2 ... 28 vpmovm2w VPMOVM2W zmm1, k1 EVEX Move Mask Register to Word Mask
62 F2 ... 39 vpmovq2m VPMOVQ2M k1, zmm1 EVEX Move Quadword Mask to Mask Register
F3 0F 38 22 vpmovsqb VPMOVSQB xmm1/m128 {k1}, zmm2 EVEX Truncate Signed Quadword to Byte
F3 0F 38 20 vpmovswb VPMOVSWB xmm1/m128 {k1}, zmm2 EVEX Truncate Signed Word to Byte
F3 0F 38 11 vpmovusdb VPMOVUSDB xmm1/m128 {k1}, zmm2 EVEX Saturate Unsigned Doubleword to Byte
F3 0F 38 12 vpmovusqb VPMOVUSQB xmm1/m128 {k1}, zmm2 EVEX Truncate Unsigned Quadword to Byte
F3 0F 38 10 vpmovuswb VPMOVUSWB xmm1/m128 {k1}, zmm2 EVEX Truncate Unsigned Word to Byte
62 F2 ... 29 vpmovw2m VPMOVW2M k1, zmm1 EVEX Move Word Mask to Mask Register
C4 ... 40 vpmulld VPMULLD ymm1, ymm2, ymm3/m256 VEX Packed Multiply Low Doubleword (AVX2)
66 0F 38 40 vpmullq VPMULLQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Packed Multiply Low Quadword
66 0F 38 83 vpmultishiftqb VPMULTISHIFTQB zmm1 {k1}, zmm2, zmm3/m512 EVEX Select Packed Unaligned Bytes from Quadword Sources
66 0F 38 54 vpopcntb VPOPCNTB zmm1 {k1}, zmm2/m512 EVEX Packed Population Count Byte
66 0F 38 55 vpopcntd VPOPCNTD zmm1 {k1}, zmm2/m512 EVEX Packed Population Count Doubleword
66 0F 38 55 vpopcntq VPOPCNTQ zmm1 {k1}, zmm2/m512 EVEX Packed Population Count Quadword
66 0F 38 54 vpopcntw VPOPCNTW zmm1 {k1}, zmm2/m512 EVEX Packed Population Count Word
66 0F 72 /2 vprolq VPROLQ zmm1 {k1}, zmm2, imm8 EVEX Rotate Left Quadword
66 0F 38 15 vprolvd VPROLVD zmm1 {k1}, zmm2, zmm3/m512 EVEX Rotate Left Doubleword Variable
66 0F 38 15 vprolvq VPROLVQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Rotate Left Quadword Variable
66 0F 72 /0 vprorq VPRORQ zmm1 {k1}, zmm2, imm8 EVEX Rotate Right Quadword
66 0F 38 14 vprorvd VPRORVD zmm1 {k1}, zmm2, zmm3/m512 EVEX Rotate Right Doubleword Variable
66 0F 38 14 vprorvq VPRORVQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Rotate Right Quadword Variable
8F ... 90 vprotb VPROTB xmm1, xmm2/m128, imm8 XOP Vector Packed Rotate Byte
8F ... 92 vprotd VPROTD xmm1, xmm2/m128, imm8 XOP Vector Packed Rotate Doubleword
8F ... 93 vprotq VPROTQ xmm1, xmm2/m128, imm8 XOP Vector Packed Rotate Quadword
8F ... 91 vprotw VPROTW xmm1, xmm2/m128, imm8 XOP Vector Packed Rotate Word
8F ... 98 vpshab VPSHAB xmm1, xmm2/m128, imm8 XOP Vector Packed Shift Arithmetic Byte
8F ... 9A vpshad VPSHAD xmm1, xmm2/m128, imm8 XOP Vector Packed Shift Arithmetic Doubleword
8F ... 9B vpshaq VPSHAQ xmm1, xmm2/m128, imm8 XOP Vector Packed Shift Arithmetic Quadword
8F ... 99 vpshaw VPSHAW xmm1, xmm2/m128, imm8 XOP Vector Packed Shift Arithmetic Word
66 0F 3A 71 vpshldd VPSHLDD zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Left Double Concatenate
66 0F 3A 71 vpshldq VPSHLDQ zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Left Quadword Concatenate
66 0F 3A 70 vpshldw VPSHLDW zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Left Word Concatenate
66 0F 3A 73 vpshrdd VPSHRDD zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Right Double Concatenate
66 0F 3A 73 vpshrdq VPSHRDQ zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Right Quadword Concatenate
66 0F 3A 72 vpshrdw VPSHRDW zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Shift Right Word Concatenate
C4 ... 00 vpshufb VPSHUFB ymm1, ymm2, ymm3/m256 VEX Packed Shuffle Bytes (AVX2)
66 0F 38 8F vpshufbitqmb VPSHUFBITQMB k1 {k2}, zmm2, zmm3/m512 EVEX Shuffle Bits from Quadword Elements to Mask
C4 ... 47 vpsllvd VPSLLVD ymm1, ymm2, ymm3/m256 AVX2 Variable Bit Shift Left Logical Doubleword
C4 ... 47 vpsllvq VPSLLVQ ymm1, ymm2, ymm3/m256 AVX2 Variable Bit Shift Left Logical Quadword
C4 ... 46 vpsravd VPSRAVD ymm1, ymm2, ymm3/m256 AVX2 Variable Bit Shift Right Arithmetic Doubleword
66 0F 38 46 vpsravq VPSRAVQ zmm1 {k1}, zmm2, zmm3/m512 EVEX Variable Bit Shift Right Arithmetic Quadword
C4 ... 45 vpsrlvd VPSRLVD ymm1, ymm2, ymm3/m256 AVX2 Variable Bit Shift Right Logical Doubleword
C4 ... 45 vpsrlvq VPSRLVQ ymm1, ymm2, ymm3/m256 AVX2 Variable Bit Shift Right Logical Quadword
C5 ... FA vpsubd VPSUBD ymm1, ymm2, ymm3/m256 VEX Packed Subtract Doubleword (AVX2)
66 0F 3A 25 vpternlogd VPTERNLOGD zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Doubleword Ternary Logic
66 0F 3A 25 vpternlogq VPTERNLOGQ zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Packed Quadword Ternary Logic
62 F2 ... 26 vptestmb VPTESTMB k1 {k2}, zmm2, zmm3/m512 EVEX Packed Test Mask Byte
62 F2 ... 27 vptestmd VPTESTMD k1 {k2}, zmm2, zmm3/m512 EVEX Packed Test Mask Doubleword
62 F2 ... 27 vptestmq VPTESTMQ k1 {k2}, zmm2, zmm3/m512 EVEX Packed Test Mask Quadword
62 F2 ... 26 vptestmw VPTESTMW k1 {k2}, zmm2, zmm3/m512 EVEX Packed Test Mask Word
66 0F 3A 50 vrangeps VRANGEPS zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Range Restriction Calculation Packed Single
66 0F 3A 51 vrangess VRANGESS xmm1 {k1}, xmm2, xmm3/m32, imm8 EVEX Range Restriction Calculation Scalar Single
66 0F 38 4C vrcp14ps VRCP14PS zmm1 {k1}, zmm2/m512 EVEX Compute Approximate Reciprocal (14-bit)
66 0F 3A 56 vreduceps VREDUCEPS zmm1 {k1}, zmm2/m512, imm8 EVEX Perform Reduction Transformation Packed Single
66 0F 3A 57 vreducess VREDUCESS xmm1 {k1}, xmm2, xmm3/m32, imm8 EVEX Perform Reduction Transformation Scalar Single
66 0F 3A 09 vrndscalepd VRNDSCALEPD zmm1 {k1}, zmm2/m512, imm8 EVEX Round Packed Double-Precision Floating-Point with Scale
66 0F 38 4E vrsqrt14ps VRSQRT14PS zmm1 {k1}, zmm2/m512 EVEX Compute Approximate Reciprocal Square Root (14-bit)
66 0F 38 2C vscalefpd VSCALEFPD zmm1 {k1}, zmm2, zmm3/m512 EVEX Scale Packed Float64 Values with Float64 Exponents
66 0F 38 A2 vscatterdpd VSCATTERDPD [base+zmm_idx*scale] {k1}, zmm1 EVEX Scatter Packed Double Precision
66 0F 38 A2 vscatterdps VSCATTERDPS [base+zmm_idx*scale] {k1}, zmm1 EVEX Scatter Packed Single Precision
62 F2 ... C6 /5 vscatterpf0dpd VSCATTERPF0DPD {k1}, [base+ymm_idx] EVEX Scatter Prefetch Packed Double (L1)
62 F2 ... C6 /5 vscatterpf0dps VSCATTERPF0DPS {k1}, [base+zmm_idx] EVEX Scatter Prefetch Packed Single (L1)
62 F2 ... C7 /5 vscatterpf0qpd VSCATTERPF0QPD {k1}, [base+zmm_idx] EVEX Scatter Prefetch Packed Double (L1, Qword Indices)
62 F2 ... C7 /5 vscatterpf0qps VSCATTERPF0QPS {k1}, [base+zmm_idx] EVEX Scatter Prefetch Packed Single (L1, Qword Indices)
66 0F 38 A3 vscatterqpd VSCATTERQPD [base+zmm_idx*scale] {k1}, zmm1 EVEX Scatter Packed Double Precision (Quadword Indices)
66 0F 38 A3 vscatterqps VSCATTERQPS [base+zmm_idx*scale] {k1}, zmm1 EVEX Scatter Packed Single Precision (Quadword Indices)
CC vsha512msg1 VSHA512MSG1 ymm1, xmm2 EVEX SHA512 Message Schedule 1
CD vsha512msg2 VSHA512MSG2 ymm1, ymm2 EVEX SHA512 Message Schedule 2
CB vsha512rnds2 VSHA512RNDS2 ymm1, ymm2, xmm3 EVEX SHA512 Rounds 2
66 0F 3A 23 vshuff32x4 VSHUFF32X4 zmm1 {k1}, zmm2, zmm3/m512, imm8 EVEX Shuffle Packed Float32x4
DA vsm3msg1 VSM3MSG1 xmm1, xmm2, xmm3 VEX SM3 Message Schedule 1
DE vsm3rnds2 VSM3RNDS2 xmm1, xmm2, imm8 VEX SM3 Rounds 2
DA vsm4e VSM4E xmm1, xmm2 VEX SM4 Encrypt
DA vsm4key4 VSM4KEY4 xmm1, xmm2 VEX SM4 Key Generation
51 vsqrtph VSQRTPH zmm1 {k1}, zmm2/m512 EVEX Square Root Packed FP16 Values
51 vsqrtsh VSQRTSH xmm1 {k1}, xmm2/m16 EVEX Square Root Scalar Half-Precision
5C vsubph VSUBPH zmm1 {k1}, zmm2, zmm3/m512 EVEX Subtract Packed FP16 Values
5C vsubsh VSUBSH xmm1 {k1}, xmm2, xmm3/m16 EVEX Subtract Scalar Half-Precision
66 0F 38 0F vtestpd VTESTPD xmm1, xmm2/m128 AVX Packed Bit Test Double-Precision
66 0F 38 0E vtestps VTESTPS xmm1, xmm2/m128 AVX Packed Bit Test Single-Precision
C5 FC 77 vzeroall VZEROALL VEX Zero All YMM Registers
C5 F8 77 vzeroupper VZEROUPPER VEX Zero Upper Bits of YMM Registers
9B wait WAIT Legacy Wait
0F 09 wbinvd WBINVD System Write Back and Invalidate Cache
F3 0F 09 wbnoinvd WBNOINVD Legacy Write Back and Do Not Invalidate Cache
F3 0F AE /2 wrfsbase WRFSBASE r64 Legacy Write FS Base
F3 0F AE /3 wrgsbase WRGSBASE r64 Legacy Write GS Base
0F 30 wrmsr WRMSR System Write Model Specific Register
0F 01 EF wrpkru WRPKRU Legacy Write Protection Key Rights
C6 F8 xabort XABORT imm8 Legacy Transaction Abort
0F C1 xadd XADD r/m, r Legacy Exchange and Add
C7 F8 xbegin XBEGIN rel Legacy Transaction Begin
87 xchg XCHG r/m, r Legacy Exchange Register/Memory with Register
0F 01 D5 xend XEND Legacy Transaction End
0F 01 D0 xgetbv XGETBV Legacy Get Value of Extended Control Register
D7 xlat XLAT m8 Legacy Table Look-up Translation
30-35 xor XOR r/m, r Legacy Logical Exclusive OR
31 xor XOR r/m, r Legacy Logical Exclusive OR
0F 57 xorps XORPS xmm, xmm/m128 SSE Bitwise Logical XOR Packed Single-Precision
0F AE /5 xrstor XRSTOR m Legacy Restore Processor Extended States
0F C7 /3 xrstors XRSTORS m Legacy Restore Supervisor States
0F AE /4 xsave XSAVE m Legacy Save Processor Extended States
0F C7 /4 xsavec XSAVEC m Legacy Save Processor Extended States with Compaction
0F AE /6 xsaveopt XSAVEOPT m Legacy Save Processor Extended States Optimized
0F C7 /5 xsaves XSAVES m Legacy Save Supervisor States
0F 01 D1 xsetbv XSETBV Legacy Set Value of Extended Control Register
0F 01 D6 xtest XTEST Legacy Test If In Transaction