vmload
Load State from VMCB
VMLOAD
Loads processor state from VMCB (AMD SVM).
Details
Loads processor state (segments, control registers, debug registers, and other hidden state) from the VMCB (Virtual Machine Control Block) referenced by RAX without switching to guest mode execution. Part of AMD SVM; requires 64-bit mode and appropriate privilege level; no flags are affected. This instruction is typically used in host or nested virtualization contexts to synchronize host state.
Pseudocode Operation
VMCB_addr ← RAX;
load_state_from_VMCB(VMCB_addr);
Example
VMLOAD
Encoding
Binary Layout
0F
+0
01
+1
DA
+2
Operands
Reference (AMD APM)
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| 0F 01 DA | VMLOAD rAX | Load additional state from VMCB. |
Description
Loads a subset of processor state from the VMCB specified by the system-physical address in the rAX register. The portion of RAX used to form the address is determined by the effective address size.
The VMSAVE and VMLOAD instructions complement the state save/restore abilities of VMRUN and
#VMEXIT, providing access to hidden state that software is otherwise unable to access, plus some additional commonly-used state.
This is a Secure Virtual Machine (SVM) instruction. Support for the SVM architecture and the SVM instructions is indicated by CPUID Fn8000_0001_ECX[SVM] = 1. For more information on using the
CPUID instruction, see the reference page for the CPUID instruction on page 165.
This instruction generates a #UD exception if SVM is not enabled. See “Enabling SVM” in APM
Volume 2.
Operation
IF ((MSR_EFER.SVME == 0) || (!PROTECTED_MODE)) EXCEPTION [#UD] // This instruction can only be executed in protected // mode with SVM enabled IF (CPL != 0) // This instruction is only allowed at CPL 0 EXCEPTION [#GP] IF (rAX contains an unsupported system-physical address) EXCEPTION [#GP] Load from a VMCB at system-physical address rAX: FS, GS, TR, LDTR (including all hidden state) KernelGsBase STAR, LSTAR, CSTAR, SFMASK SYSENTER_CS, SYSENTER_ESP, SYSENTER_EIP
Flags Affected
None. System Instruction Reference 489