valignq

Align Quadword Vectors

VALIGNQ zmm1 {k1}, zmm2, zmm3/m512, imm8

Extracts 512-bits from two concatenated ZMMs shifted by count.

Details

The Align Quadword Vectors instruction extracts 512-bits from two concatenated ZMMs shifted by count.

Pseudocode Operation

// Extracts 512-bits from two concatenated ZMMs shifted by count

Example

VALIGNQ zmm1, zmm2, zmm3/m512, 3

Encoding

Binary Layout
EVEX
+0
66
+4
0F
+5
3A
+6
03
+7
 
Format EVEX
Opcode 66 0F 3A 03
Extension AVX-512F

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand
  • src3
    8-bit signed immediate