vdbpsadbw

Double Block Packed Sum-Absolute-Differences

VDBPSADBW zmm1 {k1}, zmm2, zmm3/m512, imm8

Computes SAD on 16-bit blocks.

Details

The Double Block Packed Sum-Absolute-Differences instruction computes SAD on 16-bit blocks.

Pseudocode Operation

// Computes SAD on 16-bit blocks

Example

VDBPSADBW zmm1, zmm2, zmm3/m512, 3

Encoding

Binary Layout
EVEX
+0
66
+4
0F
+5
3A
+6
42
+7
 
Format EVEX
Opcode 66 0F 3A 42
Extension AVX-512BW

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand
  • src3
    8-bit signed immediate