repe cmps

Repeat Compare String Equal

REPE CMPS m, m

Compares [ESI] and [EDI] until mismatch or ECX=0.

Pseudocode Operation

while (RCX != 0) {
  if (OperandSize == 8) {
    result ← [RSI] - [RDI];
    if (DF == 0) { RSI ← RSI + 1; RDI ← RDI + 1; } else { RSI ← RSI - 1; RDI ← RDI - 1; }
  } else if (OperandSize == 16) {
    result ← [RSI] - [RDI];
    if (DF == 0) { RSI ← RSI + 2; RDI ← RDI + 2; } else { RSI ← RSI - 2; RDI ← RDI - 2; }
  } else {
    result ← [RSI] - [RDI];
    if (DF == 0) { RSI ← RSI + 4; RDI ← RDI + 4; } else { RSI ← RSI - 4; RDI ← RDI - 4; }
  }
  RCX ← RCX - 1;
  OF ← OverflowFlag(result); SF ← SignBit(result); ZF ← (result == 0); AF ← AuxiliaryFlag(result); CF ← CarryFlag(result); PF ← ParityFlag(result);
  if (ZF == 0) break;
}

Example

REPE CMPS m, [rbp-8]

Encoding

Binary Layout

F3

+0

 

Format Legacy

Opcode F3 A6

Extension Base

Operands

• dest
  Implicit memory for CMPS string compare (DS:[SI] vs ES:[DI])
• src
  Memory operand

Related

More in Base

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
F3 A6	REPE CMPS m8, m8				Compares bytes at [RSI] and [RDI], repeating while equal and (E/R)CX is nonzero, decrementing (E/R)CX each iteration.
F3 A7	REPE CMPS m32, m32				Doubleword form of REPE CMPS.

Description

Repeats CMPS (byte/word/doubleword/quadword string compare) while ZF=1 (equal) and the count register is nonzero, updating SI/DI and the count register each iteration. Used to find the first differing byte between two buffers.