rdseed
Read Random Seed
Retrieves a random seed from hardware entropy source.
Pseudocode Operation
temp ← hardware_entropy_source();
if (entropy_success) {
dest ← temp;
CF ← 1;
} else {
CF ← 0;
}Example
Encoding
Operands
-
dest
32-bit general-purpose register (e.g. EAX)
Related
More in RDSEED
Reference
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| NFx 0F C7 /7 | RDSEED | M | V/V | Read a 16-bit NIST SP800-90B & C compliant random value and RDSEED r16 store in the destination register. | |
| NFx 0F C7 /7 | RDSEED | M | V/V | Read a 32-bit NIST SP800-90B & C compliant random value and RDSEED r32 store in the destination register. | |
| NFx REX.W + 0F C7 /7 | RDSEED | M | V/I | Read a 64-bit NIST SP800-90B & C compliant random value and RDSEED r64 store in the destination register. |
Description
Loads a hardware generated random value and store it in the destination register. The random value is generated from an Enhanced NRBG (Non Deterministic Random Bit Generator) that is compliant to NIST SP800-90B and NIST SP800-90C in the XOR construction mode. The size of the random value is determined by the destination register size and operating mode. The Carry Flag indicates whether a random value is available at the time the instruction is executed. CF=1 indicates that the data in the destination is valid. Otherwise CF=0 and the data in the destination operand will be returned as zeros for the specified width. All other flags are forced to 0 in either situation. Software must check the state of CF=1 for determining if a valid random seed value has been returned, otherwise it is expected to loop and retry execution of RDSEED (see Section 1.2). The RDSEED instruction is available at all privilege levels. The RDSEED instruction executes normally either inside or outside a transaction region. In 64-bit mode, the instruction's default operand size is 32 bits. Using a REX prefix in the form of REX.B permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bit operands. See the summary chart at the beginning of this section for encoding data and limits.
Operation
IF HW_NRND_GEN.ready = 1 THEN CASE of operand size is 64: DEST[63:0] := HW_NRND_GEN.data; operand size is 32: DEST[31:0] := HW_NRND_GEN.data; operand size is 16: DEST[15:0] := HW_NRND_GEN.data; ESAC; CF := 1; ELSE CASE of operand size is 64: DEST[63:0] := 0; operand size is 32: DEST[31:0] := 0; operand size is 16: DEST[15:0] := 0; ESAC; CF := 0; FI; OF, SF, ZF, AF, PF := 0;