fcom
Compare Real
FCOM m32fp/m64fp
Compares ST(0) with source.
Details
Compares ST(0) with a single-precision (m32fp) or double-precision (m64fp) floating-point memory operand and sets the FPU condition code flags (C0, C2, C3) in the status word. The comparison result is reflected only in FPU flags, not in CPU EFLAGS. This instruction does not modify the stack.
Pseudocode Operation
src_value ← [memory];
if (ST(0) > src_value) { C0←0; C2←0; C3←0; }
else if (ST(0) < src_value) { C0←1; C2←0; C3←0; }
else if (ST(0) == src_value) { C0←0; C2←0; C3←1; }
else { C0←1; C2←1; C3←1; }Example
FCOM m32fp/m64fp
Encoding
Binary Layout
D8
+0
ModRM
+1
Operands
-
src
Memory/Reg
Reference (Intel® SDM)
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| D8 /2 | FCOM m32fp | Valid Valid | Compare ST(0) with m32fp. | ||
| DC /2 | FCOM m64fp | Valid Valid | Compare ST(0) with m64fp. | ||
| D8 D0+i | FCOM ST(i) | Valid Valid | Compare ST(0) with ST(i). | ||
| D8 D1 | FCOM | Valid Valid | Compare ST(0) with ST(1). | ||
| D8 /3 | FCOMP m32fp | Valid Valid | Compare ST(0) with m32fp and pop register stack. | ||
| DC /3 | FCOMP m64fp | Valid Valid | Compare ST(0) with m64fp and pop register stack. | ||
| D8 D8+i | FCOMP ST(i) | Valid Valid | Compare ST(0) with ST(i) and pop register stack. | ||
| D8 D9 | FCOMP | Valid Valid | Compare ST(0) with ST(1) and pop register stack. | ||
| DE D9 | FCOMPP | Valid Valid | Compare ST(0) with ST(1) and pop register stack twice. |
Description
Compares the contents of register ST(0) and source value and sets condition code flags C0, C2, and C3 in the FPU status word according to the results (see the table below). The source operand can be a data register or a memory location. If no source operand is given, the value in ST(0) is compared with the value in ST(1). The sign of zero is ignored, so that –0.0 is equal to +0.0.
Table 3-23. FCOM/FCOMP/FCOMPP Results
Condition C3 C2 C0
ST(0) > SRC 0 0 0
ST(0) < SRC 0 0 1
ST(0) = SRC 1 0 0
Unordered* 1 1 1
Operation
CASE (relation of operands) OF ST > SRC: C3, C2, C0 := 000; ST < SRC: C3, C2, C0 := 001; ST = SRC: C3, C2, C0 := 100; ESAC; IF ST(0) or SRC = NaN or unsupported format THEN #IA IF FPUControlWord.IM = 1 THEN C3, C2, C0 := 111; FI; FI; IF Instruction = FCOMP THEN PopRegisterStack; FI; IF Instruction = FCOMPP THEN PopRegisterStack; PopRegisterStack; FI;
Exceptions
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register contains a NULL segment selector.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the
current privilege level is 3.
#UD If the LOCK prefix is used.
Real-Address Mode Exceptions
#GP If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
#SS If a memory operand effective address is outside the SS segment limit.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#UD If the LOCK prefix is used.
FCOM/FCOMP/FCOMPP—Compare Floating-Point Values Vol. 2A 3-325
Virtual-8086 Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made.
#UD If the LOCK prefix is used.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-canonical form.
#GP(0) If the memory address is in a non-canonical form.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#MF If there is a pending x87 FPU exception.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the
current privilege level is 3.
#UD If the LOCK prefix is used.
FCOM/FCOMP/FCOMPP—Compare Floating-Point Values Vol. 2A 3-326